blob: 8c03ab8298cff233bbde639e5cf04c022aa618bd [file] [log] [blame]
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +00001/*
Govindraj Raja24d3a4e2023-12-21 13:57:49 -06002 * Copyright (c) 2022-2024, Arm Limited and Contributors. All rights reserved.
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Andre Przywara5b005112022-11-14 15:38:58 +00007#include <arch_features.h>
8#include <common/debug.h>
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +00009#include <common/feat_detect.h>
10
Andre Przywaracc4118d2022-11-14 15:42:44 +000011static bool tainted;
12
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000013/*******************************************************************************
14 * This section lists the wrapper modules for each feature to evaluate the
Andre Przywara5b005112022-11-14 15:38:58 +000015 * feature states (FEAT_STATE_ALWAYS and FEAT_STATE_CHECK) and perform
16 * necessary action as below:
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000017 *
18 * It verifies whether the FEAT_XXX (eg: FEAT_SB) is supported by the PE or not.
19 * Without this check an exception would occur during context save/restore
20 * routines, if the feature is enabled but not supported by PE.
21 ******************************************************************************/
22
Andre Przywara5b005112022-11-14 15:38:58 +000023#define feat_detect_panic(a, b) ((a) ? (void)0 : feature_panic(b))
24
25/*******************************************************************************
26 * Function : feature_panic
27 * Customised panic function with error logging mechanism to list the feature
28 * not supported by the PE.
29 ******************************************************************************/
30static inline void feature_panic(char *feat_name)
31{
32 ERROR("FEAT_%s not supported by the PE\n", feat_name);
33 panic();
34}
35
Andre Przywaracc4118d2022-11-14 15:42:44 +000036/*******************************************************************************
37 * Function : check_feature
38 * Check for a valid combination of build time flags (ENABLE_FEAT_xxx) and
Andre Przywara2f3e79a2023-02-01 11:46:31 +000039 * feature availability on the hardware. <min> is the smallest feature
40 * ID field value that is required for that feature.
41 * Triggers a panic later if a feature is forcefully enabled, but not
42 * available on the PE. Also will panic if the hardware feature ID field
43 * is larger than the maximum known and supported number, specified by <max>.
Andre Przywaracc4118d2022-11-14 15:42:44 +000044 *
45 * We force inlining here to let the compiler optimise away the whole check
46 * if the feature is disabled at build time (FEAT_STATE_DISABLED).
47 ******************************************************************************/
48static inline void __attribute((__always_inline__))
Andre Przywara2f3e79a2023-02-01 11:46:31 +000049check_feature(int state, unsigned long field, const char *feat_name,
50 unsigned int min, unsigned int max)
Andre Przywaracc4118d2022-11-14 15:42:44 +000051{
Andre Przywara2f3e79a2023-02-01 11:46:31 +000052 if (state == FEAT_STATE_ALWAYS && field < min) {
Andre Przywaracc4118d2022-11-14 15:42:44 +000053 ERROR("FEAT_%s not supported by the PE\n", feat_name);
54 tainted = true;
55 }
Andre Przywara2f3e79a2023-02-01 11:46:31 +000056 if (state >= FEAT_STATE_ALWAYS && field > max) {
57 ERROR("FEAT_%s is version %ld, but is only known up to version %d\n",
58 feat_name, field, max);
59 tainted = true;
60 }
Andre Przywaracc4118d2022-11-14 15:42:44 +000061}
62
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000063/************************************************
64 * Feature : FEAT_PAUTH (Pointer Authentication)
65 ***********************************************/
66static void read_feat_pauth(void)
67{
Andre Przywara5b005112022-11-14 15:38:58 +000068#if (ENABLE_PAUTH == FEAT_STATE_ALWAYS) || (CTX_INCLUDE_PAUTH_REGS == FEAT_STATE_ALWAYS)
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000069 feat_detect_panic(is_armv8_3_pauth_present(), "PAUTH");
70#endif
71}
72
Sona Mathewd8e89d52024-04-19 00:24:18 -050073static unsigned int read_feat_rng_trap_id_field(void)
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000074{
Sona Mathewd8e89d52024-04-19 00:24:18 -050075 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT,
76 ID_AA64PFR1_EL1_RNDR_TRAP_MASK);
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000077}
78
Sona Mathewd8e89d52024-04-19 00:24:18 -050079static unsigned int read_feat_bti_id_field(void)
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000080{
Sona Mathewd8e89d52024-04-19 00:24:18 -050081 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_BT_SHIFT,
82 ID_AA64PFR1_EL1_BT_MASK);
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000083}
84
Sona Mathewd8e89d52024-04-19 00:24:18 -050085static unsigned int read_feat_sb_id_field(void)
Juan Pablo Conde42305f22022-07-12 16:40:29 -040086{
Sona Mathewd8e89d52024-04-19 00:24:18 -050087 return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB_SHIFT,
88 ID_AA64ISAR1_SB_MASK);
Juan Pablo Conde42305f22022-07-12 16:40:29 -040089}
90
Sona Mathewd8e89d52024-04-19 00:24:18 -050091static unsigned int read_feat_csv2_id_field(void)
92{
93 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2_SHIFT,
94 ID_AA64PFR0_CSV2_MASK);
95}
96
Arvind Ram Prakash05b47632024-05-22 15:24:00 -050097static unsigned int read_feat_debugv8p9_id_field(void)
98{
99 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_DEBUGVER_SHIFT,
100 ID_AA64DFR0_DEBUGVER_MASK);
101}
102
Sona Mathewd8e89d52024-04-19 00:24:18 -0500103static unsigned int read_feat_pmuv3_id_field(void)
104{
105 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMUVER_SHIFT,
106 ID_AA64DFR0_PMUVER_MASK);
107}
108
109static unsigned int read_feat_vhe_id_field(void)
110{
111 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE_SHIFT,
112 ID_AA64MMFR1_EL1_VHE_MASK);
113}
114
115static unsigned int read_feat_sve_id_field(void)
116{
117 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SVE_SHIFT,
118 ID_AA64PFR0_SVE_MASK);
119}
120
121static unsigned int read_feat_ras_id_field(void)
122{
123 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_RAS_SHIFT,
124 ID_AA64PFR0_RAS_MASK);
125}
126
127static unsigned int read_feat_dit_id_field(void)
128{
129 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_DIT_SHIFT,
130 ID_AA64PFR0_DIT_MASK);
131}
132
133static unsigned int read_feat_amu_id_field(void)
134{
135 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU_SHIFT,
136 ID_AA64PFR0_AMU_MASK);
137}
138
139static unsigned int read_feat_mpam_version(void)
140{
141 return (unsigned int)((((read_id_aa64pfr0_el1() >>
142 ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
143 ((read_id_aa64pfr1_el1() >>
144 ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
145}
146
147static unsigned int read_feat_nv_id_field(void)
148{
149 return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV_SHIFT,
150 ID_AA64MMFR2_EL1_NV_MASK);
151}
152
153static unsigned int read_feat_sel2_id_field(void)
154{
155 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2_SHIFT,
156 ID_AA64PFR0_SEL2_MASK);
157}
158
159static unsigned int read_feat_trf_id_field(void)
160{
161 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT_SHIFT,
162 ID_AA64DFR0_TRACEFILT_MASK);
163}
164static unsigned int get_armv8_5_mte_support(void)
165{
166 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_MTE_SHIFT,
167 ID_AA64PFR1_EL1_MTE_MASK);
168}
169static unsigned int read_feat_rng_id_field(void)
170{
171 return ISOLATE_FIELD(read_id_aa64isar0_el1(), ID_AA64ISAR0_RNDR_SHIFT,
172 ID_AA64ISAR0_RNDR_MASK);
173}
174static unsigned int read_feat_fgt_id_field(void)
175{
176 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT_SHIFT,
177 ID_AA64MMFR0_EL1_FGT_MASK);
178}
179static unsigned int read_feat_ecv_id_field(void)
180{
181 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV_SHIFT,
182 ID_AA64MMFR0_EL1_ECV_MASK);
183}
184static unsigned int read_feat_twed_id_field(void)
185{
186 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED_SHIFT,
187 ID_AA64MMFR1_EL1_TWED_MASK);
188}
189
190static unsigned int read_feat_hcx_id_field(void)
191{
192 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX_SHIFT,
193 ID_AA64MMFR1_EL1_HCX_MASK);
194}
Andre Przywara8fc8e182024-08-09 17:04:22 +0100195static unsigned int read_feat_ls64_id_field(void)
196{
197 return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_LS64_SHIFT,
198 ID_AA64ISAR1_LS64_MASK);
199}
Sona Mathewd8e89d52024-04-19 00:24:18 -0500200static unsigned int read_feat_tcr2_id_field(void)
201{
202 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX_SHIFT,
203 ID_AA64MMFR3_EL1_TCRX_MASK);
204}
205static unsigned int read_feat_s2pie_id_field(void)
206{
207 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2PIE_SHIFT,
208 ID_AA64MMFR3_EL1_S2PIE_MASK);
209}
210static unsigned int read_feat_s1pie_id_field(void)
211{
212 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1PIE_SHIFT,
213 ID_AA64MMFR3_EL1_S1PIE_MASK);
214}
215static unsigned int read_feat_s2poe_id_field(void)
216{
217 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2POE_SHIFT,
218 ID_AA64MMFR3_EL1_S2POE_MASK);
219}
220static unsigned int read_feat_s1poe_id_field(void)
221{
222 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1POE_SHIFT,
223 ID_AA64MMFR3_EL1_S1POE_MASK);
224}
225static unsigned int read_feat_brbe_id_field(void)
226{
227 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE_SHIFT,
228 ID_AA64DFR0_BRBE_MASK);
229}
230static unsigned int read_feat_trbe_id_field(void)
231{
232 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER_SHIFT,
233 ID_AA64DFR0_TRACEBUFFER_MASK);
234}
235static unsigned int read_feat_sme_id_field(void)
236{
237 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_SME_SHIFT,
238 ID_AA64PFR1_EL1_SME_MASK);
239}
240static unsigned int read_feat_gcs_id_field(void)
241{
242 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_GCS_SHIFT,
243 ID_AA64PFR1_EL1_GCS_MASK);
244}
245
246static unsigned int read_feat_rme_id_field(void)
247{
248 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_FEAT_RME_SHIFT,
249 ID_AA64PFR0_FEAT_RME_MASK);
250}
251
252static unsigned int read_feat_pan_id_field(void)
253{
254 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN_SHIFT,
255 ID_AA64MMFR1_EL1_PAN_MASK);
256}
257
258static unsigned int read_feat_mtpmu_id_field(void)
259{
260 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_MTPMU_SHIFT,
261 ID_AA64DFR0_MTPMU_MASK);
262
263}
264
Jayanth Dodderi Chidanand6b706862024-09-05 22:24:04 +0100265static unsigned int read_feat_the_id_field(void)
266{
267 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_THE_SHIFT,
268 ID_AA64PFR1_EL1_THE_MASK);
269}
270
Jayanth Dodderi Chidanand70cc1752024-09-06 13:49:31 +0100271static unsigned int read_feat_sctlr2_id_field(void)
272{
273 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_SCTLR2_SHIFT,
274 ID_AA64MMFR3_EL1_SCTLR2_MASK);
275}
276
Govindraj Rajae63794e2024-09-06 15:43:43 +0100277static unsigned int read_feat_d128_id_field(void)
278{
279 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_D128_SHIFT,
280 ID_AA64MMFR3_EL1_D128_MASK);
281}
282
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000283/***********************************************************************************
284 * TF-A supports many Arm architectural features starting from arch version
285 * (8.0 till 8.7+). These features are mostly enabled through build flags. This
286 * mechanism helps in validating these build flags in the early boot phase
287 * either in BL1 or BL31 depending on the platform and assists in identifying
288 * and notifying the features which are enabled but not supported by the PE.
289 *
290 * It reads all the enabled features ID-registers and ensures the features
291 * are supported by the PE.
292 * In case if they aren't it stops booting at an early phase and logs the error
293 * messages, notifying the platforms about the features that are not supported.
294 *
295 * Further the procedure is implemented with a tri-state approach for each feature:
296 * ENABLE_FEAT_xxx = 0 : The feature is disabled statically at compile time
297 * ENABLE_FEAT_xxx = 1 : The feature is enabled and must be present in hardware.
298 * There will be panic if feature is not present at cold boot.
299 * ENABLE_FEAT_xxx = 2 : The feature is enabled but dynamically enabled at runtime
300 * depending on hardware capability.
301 *
Andre Przywara5b005112022-11-14 15:38:58 +0000302 * For better readability, state values are defined with macros, namely:
303 * { FEAT_STATE_DISABLED, FEAT_STATE_ALWAYS, FEAT_STATE_CHECK }, taking values
304 * { 0, 1, 2 }, respectively, as their naming.
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000305 **********************************************************************************/
306void detect_arch_features(void)
307{
Andre Przywaracc4118d2022-11-14 15:42:44 +0000308 tainted = false;
309
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000310 /* v8.0 features */
Sona Mathew9e505f92024-03-13 11:33:54 -0500311 check_feature(ENABLE_FEAT_SB, read_feat_sb_id_field(), "SB", 1, 1);
Andre Przywara902c9022022-11-17 17:30:43 +0000312 check_feature(ENABLE_FEAT_CSV2_2, read_feat_csv2_id_field(),
Sona Mathew9e505f92024-03-13 11:33:54 -0500313 "CSV2_2", 2, 3);
Boyan Karatotev05504ba2023-02-15 13:21:50 +0000314 /*
315 * Even though the PMUv3 is an OPTIONAL feature, it is always
316 * implemented and Arm prescribes so. So assume it will be there and do
317 * away with a flag for it. This is used to check minor PMUv3px
318 * revisions so that we catch them as they come along
319 */
320 check_feature(FEAT_STATE_ALWAYS, read_feat_pmuv3_id_field(),
Andre Przywara4f4a74d2024-03-07 17:40:55 +0000321 "PMUv3", 1, ID_AA64DFR0_PMUVER_PMUV3P8);
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000322
323 /* v8.1 features */
Sona Mathew9e505f92024-03-13 11:33:54 -0500324 check_feature(ENABLE_FEAT_PAN, read_feat_pan_id_field(), "PAN", 1, 3);
Andre Przywara98908b32022-11-17 16:42:09 +0000325 check_feature(ENABLE_FEAT_VHE, read_feat_vhe_id_field(), "VHE", 1, 1);
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000326
327 /* v8.2 features */
Jayanth Dodderi Chidanandd62c6812023-03-07 10:43:19 +0000328 check_feature(ENABLE_SVE_FOR_NS, read_feat_sve_id_field(),
Sona Mathew9e505f92024-03-13 11:33:54 -0500329 "SVE", 1, 1);
Andre Przywara870627e2023-01-27 12:25:49 +0000330 check_feature(ENABLE_FEAT_RAS, read_feat_ras_id_field(), "RAS", 1, 2);
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000331
332 /* v8.3 features */
Sona Mathewd8e89d52024-04-19 00:24:18 -0500333 /* TODO: Pauth yet to convert to tri-state feat detect logic */
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000334 read_feat_pauth();
335
336 /* v8.4 features */
Sona Mathew9e505f92024-03-13 11:33:54 -0500337 check_feature(ENABLE_FEAT_DIT, read_feat_dit_id_field(), "DIT", 1, 1);
Andre Przywara0b7f1b02023-03-21 13:53:19 +0000338 check_feature(ENABLE_FEAT_AMU, read_feat_amu_id_field(),
Andre Przywara2f3e79a2023-02-01 11:46:31 +0000339 "AMUv1", 1, 2);
Arvind Ram Prakashab28d4b2023-10-11 12:10:56 -0500340 check_feature(ENABLE_FEAT_MPAM, read_feat_mpam_version(),
Andre Przywaraa96d4502023-03-21 14:44:59 +0000341 "MPAM", 1, 17);
Andre Przywaraedc449d2023-01-27 14:09:20 +0000342 check_feature(CTX_INCLUDE_NEVE_REGS, read_feat_nv_id_field(),
Sona Mathew9e505f92024-03-13 11:33:54 -0500343 "NV2", 2, 2);
Andre Przywara6dd2d062023-02-22 16:53:50 +0000344 check_feature(ENABLE_FEAT_SEL2, read_feat_sel2_id_field(),
345 "SEL2", 1, 1);
Andre Przywara06ea44e2022-11-17 17:30:43 +0000346 check_feature(ENABLE_TRF_FOR_NS, read_feat_trf_id_field(),
347 "TRF", 1, 1);
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000348
349 /* v8.5 features */
Govindraj Rajac1be66f2024-03-07 14:42:20 -0600350 check_feature(ENABLE_FEAT_MTE2, get_armv8_5_mte_support(), "MTE2",
Govindraj Rajad7b63ac2024-01-26 10:08:37 -0600351 MTE_IMPLEMENTED_ELX, MTE_IMPLEMENTED_ASY);
Andre Przywara436b4bb2023-02-22 17:55:59 +0000352 check_feature(ENABLE_FEAT_RNG, read_feat_rng_id_field(), "RNG", 1, 1);
Sona Mathewd8e89d52024-04-19 00:24:18 -0500353 check_feature(ENABLE_BTI, read_feat_bti_id_field(), "BTI", 1, 1);
354 check_feature(ENABLE_FEAT_RNG_TRAP, read_feat_rng_trap_id_field(),
355 "RNG_TRAP", 1, 1);
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000356
357 /* v8.6 features */
Andre Przywara906776e2023-03-03 10:30:06 +0000358 check_feature(ENABLE_FEAT_AMUv1p1, read_feat_amu_id_field(),
359 "AMUv1p1", 2, 2);
Arvind Ram Prakash62d87e72024-06-06 11:33:37 -0500360 check_feature(ENABLE_FEAT_FGT, read_feat_fgt_id_field(), "FGT", 1, 2);
361 check_feature(ENABLE_FEAT_FGT2, read_feat_fgt_id_field(), "FGT2", 2, 2);
Sona Mathew9e505f92024-03-13 11:33:54 -0500362 check_feature(ENABLE_FEAT_ECV, read_feat_ecv_id_field(), "ECV", 1, 2);
Andre Przywara0cf77402023-01-27 12:25:49 +0000363 check_feature(ENABLE_FEAT_TWED, read_feat_twed_id_field(),
Sona Mathew9e505f92024-03-13 11:33:54 -0500364 "TWED", 1, 1);
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000365
Boyan Karatotev677ed8a2023-02-16 09:45:29 +0000366 /*
367 * even though this is a "DISABLE" it does confusingly perform feature
368 * enablement duties like all other flags here. Check it against the HW
369 * feature when we intend to diverge from the default behaviour
370 */
Sona Mathew9e505f92024-03-13 11:33:54 -0500371 check_feature(DISABLE_MTPMU, read_feat_mtpmu_id_field(), "MTPMU", 1, 1);
Boyan Karatotev677ed8a2023-02-16 09:45:29 +0000372
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000373 /* v8.7 features */
Sona Mathew9e505f92024-03-13 11:33:54 -0500374 check_feature(ENABLE_FEAT_HCX, read_feat_hcx_id_field(), "HCX", 1, 1);
Andre Przywara8fc8e182024-08-09 17:04:22 +0100375 check_feature(ENABLE_FEAT_LS64_ACCDATA, read_feat_ls64_id_field(), "LS64", 1, 3);
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000376
Mark Brownc37eee72023-03-14 20:13:03 +0000377 /* v8.9 features */
Andre Przywara0dda4242023-04-18 16:58:36 +0100378 check_feature(ENABLE_FEAT_TCR2, read_feat_tcr2_id_field(),
Mark Brownc37eee72023-03-14 20:13:03 +0000379 "TCR2", 1, 1);
Mark Brown293a6612023-03-14 20:48:43 +0000380 check_feature(ENABLE_FEAT_S2PIE, read_feat_s2pie_id_field(),
381 "S2PIE", 1, 1);
382 check_feature(ENABLE_FEAT_S1PIE, read_feat_s1pie_id_field(),
383 "S1PIE", 1, 1);
384 check_feature(ENABLE_FEAT_S2POE, read_feat_s2poe_id_field(),
385 "S2POE", 1, 1);
386 check_feature(ENABLE_FEAT_S1POE, read_feat_s1poe_id_field(),
387 "S1POE", 1, 1);
Sona Mathew3b84c962023-10-25 16:48:19 -0500388 check_feature(ENABLE_FEAT_CSV2_3, read_feat_csv2_id_field(),
389 "CSV2_3", 3, 3);
Arvind Ram Prakash05b47632024-05-22 15:24:00 -0500390 check_feature(ENABLE_FEAT_DEBUGV8P9, read_feat_debugv8p9_id_field(),
391 "DEBUGV8P9", 11, 11);
Jayanth Dodderi Chidanand6b706862024-09-05 22:24:04 +0100392 check_feature(ENABLE_FEAT_THE, read_feat_the_id_field(),
393 "THE", 1, 1);
Jayanth Dodderi Chidanand70cc1752024-09-06 13:49:31 +0100394 check_feature(ENABLE_FEAT_SCTLR2, read_feat_sctlr2_id_field(),
395 "SCTLR2", 1, 1);
Mark Brownc37eee72023-03-14 20:13:03 +0000396
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100397 /* v9.0 features */
Andre Przywarac97c5512022-11-17 16:42:09 +0000398 check_feature(ENABLE_BRBE_FOR_NS, read_feat_brbe_id_field(),
Sona Mathew9e505f92024-03-13 11:33:54 -0500399 "BRBE", 1, 2);
Andre Przywara191eff62022-11-17 16:42:09 +0000400 check_feature(ENABLE_TRBE_FOR_NS, read_feat_trbe_id_field(),
401 "TRBE", 1, 1);
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100402
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000403 /* v9.2 features */
Jayanth Dodderi Chidanand605419a2023-03-06 23:56:14 +0000404 check_feature(ENABLE_SME_FOR_NS, read_feat_sme_id_field(),
Sona Mathew9e505f92024-03-13 11:33:54 -0500405 "SME", 1, 2);
Jayanth Dodderi Chidanandcfe053a2022-11-08 10:31:07 +0000406 check_feature(ENABLE_SME2_FOR_NS, read_feat_sme_id_field(),
Sona Mathew9e505f92024-03-13 11:33:54 -0500407 "SME2", 2, 2);
Mark Brown326f2952023-03-14 21:33:04 +0000408
Govindraj Rajae63794e2024-09-06 15:43:43 +0100409 /* v9.3 features */
410 check_feature(ENABLE_FEAT_D128, read_feat_d128_id_field(),
411 "D128", 1, 1);
412
Mark Brown326f2952023-03-14 21:33:04 +0000413 /* v9.4 features */
414 check_feature(ENABLE_FEAT_GCS, read_feat_gcs_id_field(), "GCS", 1, 1);
Sona Mathewd8e89d52024-04-19 00:24:18 -0500415 check_feature(ENABLE_RME, read_feat_rme_id_field(), "RME", 1, 1);
Andre Przywaracc4118d2022-11-14 15:42:44 +0000416
417 if (tainted) {
418 panic();
419 }
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000420}