blob: 20533ac0febac9585dae83dd6e9f73e0849b7ab0 [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +00001/*
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +01002 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arm_def.h>
32#include <bl_common.h>
33#include <console.h>
34#include <platform_def.h>
35#include <platform_tsp.h>
36#include <plat_arm.h>
37
Dan Handley9df48042015-03-19 18:58:55 +000038#define BL32_END (unsigned long)(&__BL32_END__)
39
Dan Handley9df48042015-03-19 18:58:55 +000040/* Weak definitions may be overridden in specific ARM standard platform */
41#pragma weak tsp_early_platform_setup
42#pragma weak tsp_platform_setup
43#pragma weak tsp_plat_arch_setup
44
45
46/*******************************************************************************
47 * Initialize the UART
48 ******************************************************************************/
49void arm_tsp_early_platform_setup(void)
50{
51 /*
52 * Initialize a different console than already in use to display
53 * messages from TSP
54 */
55 console_init(PLAT_ARM_TSP_UART_BASE, PLAT_ARM_TSP_UART_CLK_IN_HZ,
56 ARM_CONSOLE_BAUDRATE);
57}
58
59void tsp_early_platform_setup(void)
60{
61 arm_tsp_early_platform_setup();
62}
63
64/*******************************************************************************
65 * Perform platform specific setup placeholder
66 ******************************************************************************/
67void tsp_platform_setup(void)
68{
Achin Gupta1fa7eb62015-11-03 14:18:34 +000069 plat_arm_gic_driver_init();
Dan Handley9df48042015-03-19 18:58:55 +000070}
71
72/*******************************************************************************
73 * Perform the very early platform specific architectural setup here. At the
74 * moment this is only intializes the MMU
75 ******************************************************************************/
76void tsp_plat_arch_setup(void)
77{
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010078 arm_setup_page_tables(BL32_BASE,
79 (BL32_END - BL32_BASE),
80 BL_CODE_BASE,
Masahiro Yamada51bef612017-01-18 02:10:08 +090081 BL_CODE_END,
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010082 BL_RO_DATA_BASE,
Masahiro Yamada51bef612017-01-18 02:10:08 +090083 BL_RO_DATA_END
Dan Handley9df48042015-03-19 18:58:55 +000084#if USE_COHERENT_MEM
Masahiro Yamada0fac5af2016-12-28 16:11:41 +090085 , BL_COHERENT_RAM_BASE,
86 BL_COHERENT_RAM_END
Dan Handley9df48042015-03-19 18:58:55 +000087#endif
88 );
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +010089 enable_mmu_el1(0);
Dan Handley9df48042015-03-19 18:58:55 +000090}