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Achin Guptaa80720f2015-07-20 22:28:23 +01001/*
Soby Mathew074f6932017-02-28 22:58:29 +00002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Achin Guptaa80720f2015-07-20 22:28:23 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch.h>
32#include <assert.h>
33#include <bakery_lock.h>
34#include <ccn.h>
35#include <debug.h>
36#include <errno.h>
37#include <mmio.h>
38#include "ccn_private.h"
39
40static const ccn_desc_t *ccn_plat_desc;
Soby Mathew074f6932017-02-28 22:58:29 +000041#if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
Achin Guptaa80720f2015-07-20 22:28:23 +010042DEFINE_BAKERY_LOCK(ccn_lock);
43#endif
44
45/*******************************************************************************
46 * This function takes the base address of the CCN's programmer's view (PV), a
47 * region ID of one of the 256 regions (0-255) and a register offset within the
48 * region. It converts the first two parameters into a base address and uses it
49 * to read the register at the offset.
50 ******************************************************************************/
51static inline unsigned long long ccn_reg_read(uintptr_t periphbase,
52 unsigned int region_id,
53 unsigned int register_offset)
54{
55 uintptr_t region_base;
56
57 assert(periphbase);
58 assert(region_id < REGION_ID_LIMIT);
59
60 region_base = periphbase + region_id_to_base(region_id);
61 return mmio_read_64(region_base + register_offset);
62}
63
64/*******************************************************************************
65 * This function takes the base address of the CCN's programmer's view (PV), a
66 * region ID of one of the 256 regions (0-255), a register offset within the
67 * region and a value. It converts the first two parameters into a base address
68 * and uses it to write the value in the register at the offset.
69 ******************************************************************************/
70static inline void ccn_reg_write(uintptr_t periphbase,
71 unsigned int region_id,
72 unsigned int register_offset,
73 unsigned long long value)
74{
75 uintptr_t region_base;
76
77 assert(periphbase);
78 assert(region_id < REGION_ID_LIMIT);
79
80 region_base = periphbase + region_id_to_base(region_id);
81 mmio_write_64(region_base + register_offset, value);
82}
83
Antonio Nino Diaz3759e3f2017-03-22 15:48:51 +000084#if ENABLE_ASSERTIONS
Achin Guptaa80720f2015-07-20 22:28:23 +010085
86typedef struct rn_info {
87 unsigned char node_desc[MAX_RN_NODES];
88 } rn_info_t;
89
90/*******************************************************************************
91 * This function takes the base address of the CCN's programmer's view (PV) and
92 * the node ID of a Request Node (RN-D or RN-I). It returns the maximum number
93 * of master interfaces resident on that node. This number is equal to the least
94 * significant two bits of the node type ID + 1.
95 ******************************************************************************/
96static unsigned int ccn_get_rni_mcount(uintptr_t periphbase,
97 unsigned int rn_id)
98{
99 unsigned int rn_type_id;
100
101 /* Use the node id to find the type of RN-I/D node */
102 rn_type_id = get_node_type(ccn_reg_read(periphbase,
103 rn_id + RNI_REGION_ID_START,
104 REGION_ID_OFFSET));
105
106 /* Return the number master interfaces based on node type */
107 return rn_type_id_to_master_cnt(rn_type_id);
108}
109
110/*******************************************************************************
111 * This function reads the CCN registers to find the following information about
112 * the ACE/ACELite/ACELite+DVM/CHI interfaces resident on the various types of
113 * Request Nodes (RN-Fs, RN-Is and RN-Ds) in the system:
114 *
115 * 1. The total number of such interfaces that this CCN IP supports. This is the
116 * cumulative number of interfaces across all Request node types. It is
117 * passed back as the return value of this function.
118 *
119 * 2. The maximum number of interfaces of a type resident on a Request node of
120 * one of the three types. This information is populated in the 'info'
121 * array provided by the caller as described next.
122 *
123 * The array has 64 entries. Each entry corresponds to a Request node. The
124 * Miscellaneous node's programmer's view has RN-F, RN-I and RN-D ID
125 * registers. For each RN-I and RN-D ID indicated as being present in these
126 * registers, its identification register (offset 0xFF00) is read. This
127 * register specifies the maximum number of master interfaces the node
128 * supports. For RN-Fs it is assumed that there can be only a single fully
129 * coherent master resident on each node. The counts for each type of node
130 * are use to populate the array entry at the index corresponding to the node
131 * ID i.e. rn_info[node ID] = <number of master interfaces>
132 ******************************************************************************/
133static unsigned int ccn_get_rn_master_info(uintptr_t periphbase,
134 rn_info_t *info)
135{
136 unsigned int num_masters = 0;
137 rn_types_t rn_type;
138
139 assert (info);
140
141 for (rn_type = RN_TYPE_RNF; rn_type < NUM_RN_TYPES; rn_type++) {
142 unsigned int mn_reg_off, node_id;
143 unsigned long long rn_bitmap;
144
145 /*
146 * RN-F, RN-I, RN-D node registers in the MN region occupy
147 * contiguous 16 byte apart offsets.
148 */
149 mn_reg_off = MN_RNF_NODEID_OFFSET + (rn_type << 4);
150 rn_bitmap = ccn_reg_read(periphbase, MN_REGION_ID, mn_reg_off);
151
152 FOR_EACH_PRESENT_NODE_ID(node_id, rn_bitmap) {
153 unsigned int node_mcount;
154
155 /*
156 * A RN-F does not have a node type since it does not
157 * export a programmer's interface. It can only have a
158 * single fully coherent master residing on it. If the
159 * offset of the MN(Miscellaneous Node) register points
160 * to a RN-I/D node then the master count is set to the
161 * maximum number of master interfaces that can possibly
162 * reside on the node.
163 */
164 node_mcount = (mn_reg_off == MN_RNF_NODEID_OFFSET ? 1 :
165 ccn_get_rni_mcount(periphbase, node_id));
166
167 /*
168 * Use this value to increment the maximum possible
169 * master interfaces in the system.
170 */
171 num_masters += node_mcount;
172
173 /*
174 * Update the entry in 'info' for this node ID with
175 * the maximum number of masters than can sit on
176 * it. This information will be used to validate the
177 * node information passed by the platform later.
178 */
179 info->node_desc[node_id] = node_mcount;
180 }
181 }
182
183 return num_masters;
184}
185
186/*******************************************************************************
187 * This function validates parameters passed by the platform (in a debug build).
188 * It collects information about the maximum number of master interfaces that:
189 * a) the CCN IP can accommodate and
190 * b) can exist on each Request node.
191 * It compares this with the information provided by the platform to determine
192 * the validity of the latter.
193 ******************************************************************************/
194static void ccn_validate_plat_params(const ccn_desc_t *plat_desc)
195{
196 unsigned int master_id, num_rn_masters;
197 rn_info_t info = { {0} };
198
199 assert(plat_desc);
200 assert(plat_desc->periphbase);
201 assert(plat_desc->master_to_rn_id_map);
202 assert(plat_desc->num_masters);
203 assert(plat_desc->num_masters < CCN_MAX_RN_MASTERS);
204
205 /*
206 * Find the number and properties of fully coherent, IO coherent and IO
207 * coherent + DVM master interfaces
208 */
209 num_rn_masters = ccn_get_rn_master_info(plat_desc->periphbase, &info);
210 assert(plat_desc->num_masters < num_rn_masters);
211
212 /*
213 * Iterate through the Request nodes specified by the platform.
214 * Decrement the count of the masters in the 'info' array for each
215 * Request node encountered. If the count would drop below 0 then the
216 * platform's view of this aspect of CCN configuration is incorrect.
217 */
218 for (master_id = 0; master_id < plat_desc->num_masters; master_id++) {
219 unsigned int node_id;
220
221 node_id = plat_desc->master_to_rn_id_map[master_id];
222 assert(node_id < MAX_RN_NODES);
223 assert(info.node_desc[node_id]);
224 info.node_desc[node_id]--;
225 }
226}
Antonio Nino Diaz3759e3f2017-03-22 15:48:51 +0000227#endif /* ENABLE_ASSERTIONS */
Achin Guptaa80720f2015-07-20 22:28:23 +0100228
229/*******************************************************************************
230 * This function validates parameters passed by the platform (in a debug build)
231 * and initialises its internal data structures. A lock is required to prevent
232 * simultaneous CCN operations at runtime (only BL31) to add and remove Request
233 * nodes from coherency.
234 ******************************************************************************/
235void ccn_init(const ccn_desc_t *plat_desc)
236{
Antonio Nino Diaz3759e3f2017-03-22 15:48:51 +0000237#if ENABLE_ASSERTIONS
Achin Guptaa80720f2015-07-20 22:28:23 +0100238 ccn_validate_plat_params(plat_desc);
239#endif
240
241 ccn_plat_desc = plat_desc;
242}
243
244/*******************************************************************************
245 * This function converts a bit map of master interface IDs to a bit map of the
246 * Request node IDs that they reside on.
247 ******************************************************************************/
248static unsigned long long ccn_master_to_rn_id_map(unsigned long long master_map)
249{
250 unsigned long long rn_id_map = 0;
251 unsigned int node_id, iface_id;
252
253 assert(master_map);
254 assert(ccn_plat_desc);
255
256 FOR_EACH_PRESENT_MASTER_INTERFACE(iface_id, master_map) {
Soby Mathew095b9bc2016-03-23 17:14:57 +0000257 assert(iface_id < ccn_plat_desc->num_masters);
Achin Guptaa80720f2015-07-20 22:28:23 +0100258
259 /* Convert the master ID into the node ID */
260 node_id = ccn_plat_desc->master_to_rn_id_map[iface_id];
261
262 /* Set the bit corresponding to this node ID */
263 rn_id_map |= (1UL << node_id);
264 }
265
266 return rn_id_map;
267}
268
269/*******************************************************************************
270 * This function executes the necessary operations to add or remove Request node
271 * IDs specified in the 'rn_id_map' bitmap from the snoop/DVM domains specified
Vikram Kanigiri4aceeb02016-01-04 16:23:22 +0000272 * in the 'hn_id_map'. The 'region_id' specifies the ID of the first HN-F/MN
Achin Guptaa80720f2015-07-20 22:28:23 +0100273 * on which the operation should be performed. 'op_reg_offset' specifies the
274 * type of operation (add/remove). 'stat_reg_offset' specifies the register
275 * which should be polled to determine if the operation has completed or not.
276 ******************************************************************************/
277static void ccn_snoop_dvm_do_op(unsigned long long rn_id_map,
278 unsigned long long hn_id_map,
279 unsigned int region_id,
280 unsigned int op_reg_offset,
281 unsigned int stat_reg_offset)
282{
283 unsigned int start_region_id;
284
285 assert(ccn_plat_desc);
286 assert(ccn_plat_desc->periphbase);
287
Soby Mathew074f6932017-02-28 22:58:29 +0000288#if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
Achin Guptaa80720f2015-07-20 22:28:23 +0100289 bakery_lock_get(&ccn_lock);
290#endif
291 start_region_id = region_id;
292 FOR_EACH_PRESENT_REGION_ID(start_region_id, hn_id_map) {
293 ccn_reg_write(ccn_plat_desc->periphbase,
294 start_region_id,
295 op_reg_offset,
296 rn_id_map);
297 }
298
299 start_region_id = region_id;
300
301 FOR_EACH_PRESENT_REGION_ID(start_region_id, hn_id_map) {
302 WAIT_FOR_DOMAIN_CTRL_OP_COMPLETION(start_region_id,
303 stat_reg_offset,
304 op_reg_offset,
305 rn_id_map);
306 }
307
Soby Mathew074f6932017-02-28 22:58:29 +0000308#if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
Achin Guptaa80720f2015-07-20 22:28:23 +0100309 bakery_lock_release(&ccn_lock);
310#endif
311}
312
313/*******************************************************************************
Achin Guptaa80720f2015-07-20 22:28:23 +0100314 * The following functions provide the boot and runtime API to the platform for
315 * adding and removing master interfaces from the snoop/DVM domains. A bitmap of
316 * master interfaces IDs is passed as a parameter. It is converted into a bitmap
317 * of Request node IDs using the mapping provided by the platform while
318 * initialising the driver.
319 * For example, consider a dual cluster system where the clusters have values 0
320 * & 1 in the affinity level 1 field of their respective MPIDRs. While
321 * initialising this driver, the platform provides the mapping between each
322 * cluster and the corresponding Request node. To add or remove a cluster from
323 * the snoop and dvm domain, the bit position corresponding to the cluster ID
324 * should be set in the 'master_iface_map' i.e. to remove both clusters the
325 * bitmap would equal 0x11.
326 ******************************************************************************/
327void ccn_enter_snoop_dvm_domain(unsigned long long master_iface_map)
328{
329 unsigned long long rn_id_map;
330
331 rn_id_map = ccn_master_to_rn_id_map(master_iface_map);
Vikram Kanigiri4aceeb02016-01-04 16:23:22 +0000332 ccn_snoop_dvm_do_op(rn_id_map,
333 CCN_GET_HN_NODEID_MAP(ccn_plat_desc->periphbase,
334 MN_HNF_NODEID_OFFSET),
335 HNF_REGION_ID_START,
336 HNF_SDC_SET_OFFSET,
337 HNF_SDC_STAT_OFFSET);
Achin Guptaa80720f2015-07-20 22:28:23 +0100338
Vikram Kanigiri4aceeb02016-01-04 16:23:22 +0000339 ccn_snoop_dvm_do_op(rn_id_map,
340 CCN_GET_MN_NODEID_MAP(ccn_plat_desc->periphbase),
341 MN_REGION_ID,
342 MN_DDC_SET_OFFSET,
343 MN_DDC_STAT_OFFSET);
Achin Guptaa80720f2015-07-20 22:28:23 +0100344}
345
346void ccn_exit_snoop_dvm_domain(unsigned long long master_iface_map)
347{
348 unsigned long long rn_id_map;
349
350 rn_id_map = ccn_master_to_rn_id_map(master_iface_map);
Vikram Kanigiri4aceeb02016-01-04 16:23:22 +0000351 ccn_snoop_dvm_do_op(rn_id_map,
352 CCN_GET_HN_NODEID_MAP(ccn_plat_desc->periphbase,
353 MN_HNF_NODEID_OFFSET),
354 HNF_REGION_ID_START,
355 HNF_SDC_CLR_OFFSET,
356 HNF_SDC_STAT_OFFSET);
Achin Guptaa80720f2015-07-20 22:28:23 +0100357
Vikram Kanigiri4aceeb02016-01-04 16:23:22 +0000358 ccn_snoop_dvm_do_op(rn_id_map,
359 CCN_GET_MN_NODEID_MAP(ccn_plat_desc->periphbase),
360 MN_REGION_ID,
361 MN_DDC_CLR_OFFSET,
362 MN_DDC_STAT_OFFSET);
Achin Guptaa80720f2015-07-20 22:28:23 +0100363}
364
365void ccn_enter_dvm_domain(unsigned long long master_iface_map)
366{
367 unsigned long long rn_id_map;
368
369 rn_id_map = ccn_master_to_rn_id_map(master_iface_map);
Vikram Kanigiri4aceeb02016-01-04 16:23:22 +0000370 ccn_snoop_dvm_do_op(rn_id_map,
371 CCN_GET_MN_NODEID_MAP(ccn_plat_desc->periphbase),
372 MN_REGION_ID,
373 MN_DDC_SET_OFFSET,
374 MN_DDC_STAT_OFFSET);
Achin Guptaa80720f2015-07-20 22:28:23 +0100375}
376
377void ccn_exit_dvm_domain(unsigned long long master_iface_map)
378{
379 unsigned long long rn_id_map;
380
381 rn_id_map = ccn_master_to_rn_id_map(master_iface_map);
Vikram Kanigiri4aceeb02016-01-04 16:23:22 +0000382 ccn_snoop_dvm_do_op(rn_id_map,
383 CCN_GET_MN_NODEID_MAP(ccn_plat_desc->periphbase),
384 MN_REGION_ID,
385 MN_DDC_CLR_OFFSET,
386 MN_DDC_STAT_OFFSET);
Achin Guptaa80720f2015-07-20 22:28:23 +0100387}
388
389/*******************************************************************************
390 * This function returns the run mode of all the L3 cache partitions in the
391 * system. The state is expected to be one of NO_L3, SF_ONLY, L3_HAM or
392 * L3_FAM. Instead of comparing the states reported by all HN-Fs, the state of
393 * the first present HN-F node is reported. Since the driver does not export an
394 * interface to program them seperately, there is no reason to perform this
395 * check. An HN-F could report that the L3 cache is transitioning from one mode
396 * to another e.g. HNF_PM_NOL3_2_SFONLY. In this case, the function waits for
397 * the transition to complete and reports the final state.
398 ******************************************************************************/
399unsigned int ccn_get_l3_run_mode(void)
400{
401 unsigned long long hnf_pstate_stat;
402
403 assert(ccn_plat_desc);
404 assert(ccn_plat_desc->periphbase);
405
406 /*
407 * Wait for a L3 cache paritition to enter any run mode. The pstate
408 * parameter is read from an HN-F P-state status register. A non-zero
409 * value in bits[1:0] means that the cache is transitioning to a run
410 * mode.
411 */
412 do {
413 hnf_pstate_stat = ccn_reg_read(ccn_plat_desc->periphbase,
414 HNF_REGION_ID_START,
415 HNF_PSTATE_STAT_OFFSET);
416 } while (hnf_pstate_stat & 0x3);
417
418 return PSTATE_TO_RUN_MODE(hnf_pstate_stat);
419}
420
421/*******************************************************************************
422 * This function sets the run mode of all the L3 cache partitions in the
423 * system to one of NO_L3, SF_ONLY, L3_HAM or L3_FAM depending upon the state
424 * specified by the 'mode' argument.
425 ******************************************************************************/
426void ccn_set_l3_run_mode(unsigned int mode)
427{
428 unsigned long long mn_hnf_id_map, hnf_pstate_stat;
429 unsigned int region_id;
430
431 assert(ccn_plat_desc);
432 assert(ccn_plat_desc->periphbase);
433 assert(mode <= CCN_L3_RUN_MODE_FAM);
434
435 mn_hnf_id_map = ccn_reg_read(ccn_plat_desc->periphbase,
436 MN_REGION_ID,
437 MN_HNF_NODEID_OFFSET);
438 region_id = HNF_REGION_ID_START;
439
440 /* Program the desired run mode */
441 FOR_EACH_PRESENT_REGION_ID(region_id, mn_hnf_id_map) {
442 ccn_reg_write(ccn_plat_desc->periphbase,
443 region_id,
444 HNF_PSTATE_REQ_OFFSET,
445 mode);
446 }
447
448 /* Wait for the caches to transition to the run mode */
449 region_id = HNF_REGION_ID_START;
450 FOR_EACH_PRESENT_REGION_ID(region_id, mn_hnf_id_map) {
451 /*
452 * Wait for a L3 cache paritition to enter a target run
453 * mode. The pstate parameter is read from an HN-F P-state
454 * status register.
455 */
456 do {
457 hnf_pstate_stat = ccn_reg_read(ccn_plat_desc->periphbase,
458 region_id,
459 HNF_PSTATE_STAT_OFFSET);
460 } while (((hnf_pstate_stat & HNF_PSTATE_MASK) >> 2) != mode);
461 }
462}
463
464/*******************************************************************************
465 * This function configures system address map and provides option to enable the
466 * 3SN striping mode of Slave node operation. The Slave node IDs and the Top
467 * Address bit1 and bit0 are provided as parameters to this function. This
468 * configuration is needed only if network contains a single SN-F or 3 SN-F and
469 * must be completed before the first request by the system to normal memory.
470 ******************************************************************************/
471void ccn_program_sys_addrmap(unsigned int sn0_id,
472 unsigned int sn1_id,
473 unsigned int sn2_id,
474 unsigned int top_addr_bit0,
475 unsigned int top_addr_bit1,
476 unsigned char three_sn_en)
477{
478 unsigned long long mn_hnf_id_map, hnf_sam_ctrl_value;
479 unsigned int region_id;
480
481 assert(ccn_plat_desc);
482 assert(ccn_plat_desc->periphbase);
483
484 mn_hnf_id_map = ccn_reg_read(ccn_plat_desc->periphbase,
485 MN_REGION_ID,
486 MN_HNF_NODEID_OFFSET);
487 region_id = HNF_REGION_ID_START;
488 hnf_sam_ctrl_value = MAKE_HNF_SAM_CTRL_VALUE(sn0_id,
489 sn1_id,
490 sn2_id,
491 top_addr_bit0,
492 top_addr_bit1,
493 three_sn_en);
494
495 FOR_EACH_PRESENT_REGION_ID(region_id, mn_hnf_id_map) {
496
497 /* Program the SAM control register */
498 ccn_reg_write(ccn_plat_desc->periphbase,
499 region_id,
500 HNF_SAM_CTRL_OFFSET,
501 hnf_sam_ctrl_value);
502 }
503
504}
Soby Mathew095b9bc2016-03-23 17:14:57 +0000505
506/*******************************************************************************
507 * This function returns the part0 id from the peripheralID 0 register
508 * in CCN. This id can be used to distinguish the CCN variant present in the
509 * system.
510 ******************************************************************************/
511int ccn_get_part0_id(uintptr_t periphbase)
512{
513 assert(periphbase);
514 return (int)(mmio_read_64(periphbase
515 + MN_PERIPH_ID_0_1_OFFSET) & 0xFF);
516}