Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __PLATFORM_DEF_H__ |
| 8 | #define __PLATFORM_DEF_H__ |
| 9 | |
| 10 | #include <arch.h> |
| 11 | #include <board_def.h> |
| 12 | #include <common_def.h> |
| 13 | |
| 14 | /******************************************************************************* |
| 15 | * Generic platform constants |
| 16 | ******************************************************************************/ |
| 17 | |
| 18 | /* Size of cacheable stack */ |
| 19 | #if IMAGE_BL31 |
| 20 | #define PLATFORM_STACK_SIZE 0x800 |
| 21 | #else |
| 22 | #define PLATFORM_STACK_SIZE 0x1000 |
| 23 | #endif |
| 24 | |
| 25 | #define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \ |
| 26 | PLATFORM_CORE_COUNT) |
| 27 | #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL1 |
| 28 | |
| 29 | /******************************************************************************* |
| 30 | * Memory layout constants |
| 31 | ******************************************************************************/ |
| 32 | |
| 33 | /* |
| 34 | * ARM-TF lives in SRAM, partition it here |
| 35 | */ |
| 36 | |
| 37 | #define SHARED_RAM_BASE BL31_LIMIT |
| 38 | #define SHARED_RAM_SIZE 0x00001000 |
| 39 | |
| 40 | /* |
| 41 | * BL3-1 specific defines. |
| 42 | * |
| 43 | * Put BL3-1 at the base of the Trusted SRAM, before SHARED_RAM. |
| 44 | */ |
| 45 | #define BL31_BASE SEC_SRAM_BASE |
| 46 | #define BL31_SIZE (SEC_SRAM_SIZE - SHARED_RAM_SIZE) |
| 47 | #define BL31_LIMIT (BL31_BASE + BL31_SIZE) |
| 48 | #define BL31_PROGBITS_LIMIT BL31_LIMIT |
| 49 | |
| 50 | /* |
| 51 | * Some data must be aligned on the biggest cache line size in the platform. |
| 52 | * This is known only to the platform as it might have a combination of |
| 53 | * integrated and external caches. |
| 54 | */ |
| 55 | #define CACHE_WRITEBACK_SHIFT 6 |
| 56 | #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) |
| 57 | |
| 58 | #endif /* __PLATFORM_DEF_H__ */ |