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developer2189d3a2020-04-17 17:14:23 +08001#
2# Copyright (c) 2020, MediaTek Inc. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7MTK_PLAT := plat/mediatek
8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
9
10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
developer404e08b2020-09-18 09:32:31 +080011 -I${MTK_PLAT_SOC}/include/ \
12 -I${MTK_PLAT_SOC}/drivers/ \
developer86ada3c2020-07-03 09:19:06 +080013 -I${MTK_PLAT_SOC}/drivers/gpio/ \
developera444a202020-06-15 16:41:03 +080014 -I${MTK_PLAT_SOC}/drivers/mcdi/ \
developer31f56a72020-06-16 13:28:28 +080015 -I${MTK_PLAT_SOC}/drivers/spmc/ \
developer86ada3c2020-07-03 09:19:06 +080016 -I${MTK_PLAT_SOC}/drivers/timer/
developer2189d3a2020-04-17 17:14:23 +080017
developerf9b56842020-06-09 13:38:35 +080018GICV3_SUPPORT_GIC600 := 1
developer2189d3a2020-04-17 17:14:23 +080019include drivers/arm/gic/v3/gicv3.mk
20include lib/xlat_tables_v2/xlat_tables.mk
21
22PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \
23 ${XLAT_TABLES_LIB_SRCS} \
24 plat/common/aarch64/crash_console_helpers.S \
25 plat/common/plat_psci_common.c
26
27BL31_SOURCES += common/desc_image_load.c \
28 drivers/ti/uart/aarch64/16550_console.S \
developer404e08b2020-09-18 09:32:31 +080029 drivers/gpio/gpio.c \
developer2189d3a2020-04-17 17:14:23 +080030 lib/bl_aux_params/bl_aux_params.c \
31 lib/cpus/aarch64/cortex_a55.S \
32 lib/cpus/aarch64/cortex_a76.S \
33 plat/common/plat_gicv3.c \
34 ${MTK_PLAT}/common/mtk_plat_common.c \
35 ${MTK_PLAT}/common/params_setup.c \
36 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
37 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
38 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
39 ${MTK_PLAT_SOC}/plat_pm.c \
developerf9b56842020-06-09 13:38:35 +080040 ${MTK_PLAT_SOC}/plat_topology.c \
developer404e08b2020-09-18 09:32:31 +080041 ${MTK_PLAT_SOC}/plat_mt_gic.c \
developer28d70382019-12-19 15:58:20 +080042 ${MTK_PLAT_SOC}/plat_mt_cirq.c \
developer86ada3c2020-07-03 09:19:06 +080043 ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \
developera444a202020-06-15 16:41:03 +080044 ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c \
45 ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \
46 ${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \
developer31f56a72020-06-16 13:28:28 +080047 ${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c \
developer86ada3c2020-07-03 09:19:06 +080048 ${MTK_PLAT_SOC}/drivers/timer/mt_timer.c
developer2189d3a2020-04-17 17:14:23 +080049
developer2189d3a2020-04-17 17:14:23 +080050# Configs for A76 and A55
51HW_ASSISTED_COHERENCY := 1
52USE_COHERENT_MEM := 0
53CTX_INCLUDE_AARCH32_REGS := 0
54
55# indicate the reset vector address can be programmed
56PROGRAMMABLE_RESET_ADDRESS := 1
57
58COLD_BOOT_SINGLE_CPU := 1
59
60MACH_MT8192 := 1
61$(eval $(call add_define,MACH_MT8192))
62
63include lib/coreboot/coreboot.mk
64