blob: ab1d5d78c67384771fc76c4de54855c54990836e [file] [log] [blame]
developer65014b82015-04-13 14:47:57 +08001#
2# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are met:
6#
7# Redistributions of source code must retain the above copyright notice, this
8# list of conditions and the following disclaimer.
9#
10# Redistributions in binary form must reproduce the above copyright notice,
11# this list of conditions and the following disclaimer in the documentation
12# and/or other materials provided with the distribution.
13#
14# Neither the name of ARM nor the names of its contributors may be used
15# to endorse or promote products derived from this software without specific
16# prior written permission.
17#
18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28# POSSIBILITY OF SUCH DAMAGE.
29#
30
31MTK_PLAT := plat/mediatek
32MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
33
34PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
developer65014b82015-04-13 14:47:57 +080035 -I${MTK_PLAT_SOC}/drivers/mtcmos/ \
36 -I${MTK_PLAT_SOC}/drivers/pmic/ \
37 -I${MTK_PLAT_SOC}/drivers/rtc/ \
38 -I${MTK_PLAT_SOC}/drivers/spm/ \
39 -I${MTK_PLAT_SOC}/drivers/timer/ \
40 -I${MTK_PLAT_SOC}/drivers/uart/ \
41 -I${MTK_PLAT_SOC}/include/
42
Soby Mathewcc037c12016-04-08 16:42:58 +010043PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
44 lib/xlat_tables/aarch64/xlat_tables.c \
developer65014b82015-04-13 14:47:57 +080045 plat/common/aarch64/plat_common.c \
46 plat/common/plat_gic.c
47
48BL31_SOURCES += drivers/arm/cci/cci.c \
49 drivers/arm/gic/arm_gic.c \
50 drivers/arm/gic/gic_v2.c \
51 drivers/arm/gic/gic_v3.c \
52 drivers/console/console.S \
53 drivers/delay_timer/delay_timer.c \
54 lib/cpus/aarch64/aem_generic.S \
55 lib/cpus/aarch64/cortex_a53.S \
56 lib/cpus/aarch64/cortex_a57.S \
57 lib/cpus/aarch64/cortex_a72.S \
58 plat/common/aarch64/platform_mp_stack.S \
developer14f3fe32016-04-28 14:07:42 +080059 ${MTK_PLAT}/common/mtk_plat_common.c \
developer65014b82015-04-13 14:47:57 +080060 ${MTK_PLAT}/common/mtk_sip_svc.c \
61 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
62 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
63 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
developer65014b82015-04-13 14:47:57 +080064 ${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c \
65 ${MTK_PLAT_SOC}/drivers/pmic/pmic_wrap_init.c \
66 ${MTK_PLAT_SOC}/drivers/rtc/rtc.c \
67 ${MTK_PLAT_SOC}/drivers/spm/spm.c \
68 ${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c \
69 ${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c \
70 ${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \
71 ${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c \
72 ${MTK_PLAT_SOC}/drivers/uart/8250_console.S \
73 ${MTK_PLAT_SOC}/plat_delay_timer.c \
74 ${MTK_PLAT_SOC}/plat_mt_gic.c \
75 ${MTK_PLAT_SOC}/plat_pm.c \
76 ${MTK_PLAT_SOC}/plat_sip_calls.c \
77 ${MTK_PLAT_SOC}/plat_topology.c \
78 ${MTK_PLAT_SOC}/power_tracer.c \
79 ${MTK_PLAT_SOC}/scu.c
80
81# Flag used by the MTK_platform port to determine the version of ARM GIC
82# architecture to use for interrupt management in EL3.
83ARM_GIC_ARCH := 2
84$(eval $(call add_define,ARM_GIC_ARCH))
85
86# Enable workarounds for selected Cortex-A53 erratas.
87ERRATA_A53_826319 := 1
88ERRATA_A53_836870 := 1
89
90# indicate the reset vector address can be programmed
91PROGRAMMABLE_RESET_ADDRESS := 1
developer14f3fe32016-04-28 14:07:42 +080092
93$(eval $(call add_define,MTK_SIP_SET_AUTHORIZED_SECURE_REG_ENABLE))