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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <stdio.h>
32#include <string.h>
33#include <assert.h>
34#include <arch_helpers.h>
35#include <console.h>
36#include <platform.h>
37#include <semihosting.h>
38#include <bl_common.h>
39#include <bl31.h>
40#include <runtime_svc.h>
Achin Gupta7aea9082014-02-01 07:51:28 +000041#include <context_mgmt.h>
42
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000043
44/*******************************************************************************
45 * This function pointer is used to initialise the BL32 image. It's initialized
46 * by SPD calling bl31_register_bl32_init after setting up all things necessary
47 * for SP execution. In cases where both SPD and SP are absent, or when SPD
48 * finds it impossible to execute SP, this pointer is left as NULL
49 ******************************************************************************/
50static int32_t (*bl32_init)(meminfo *);
51
Achin Gupta7aea9082014-02-01 07:51:28 +000052/*******************************************************************************
Achin Gupta35ca3512014-02-19 17:58:33 +000053 * Variable to indicate whether next image to execute after BL31 is BL33
54 * (non-secure & default) or BL32 (secure).
55 ******************************************************************************/
56static uint32_t next_image_type = NON_SECURE;
57
58/*******************************************************************************
Achin Gupta7aea9082014-02-01 07:51:28 +000059 * Simple function to initialise all BL31 helper libraries.
60 ******************************************************************************/
61void bl31_lib_init()
62{
63 cm_init();
64}
Achin Gupta4f6ad662013-10-25 09:08:21 +010065
Achin Gupta4f6ad662013-10-25 09:08:21 +010066/*******************************************************************************
67 * BL31 is responsible for setting up the runtime services for the primary cpu
Achin Gupta35ca3512014-02-19 17:58:33 +000068 * before passing control to the bootloader or an Operating System. This
69 * function calls runtime_svc_init() which initializes all registered runtime
70 * services. The run time services would setup enough context for the core to
71 * swtich to the next exception level. When this function returns, the core will
72 * switch to the programmed exception level via. an ERET.
Achin Gupta4f6ad662013-10-25 09:08:21 +010073 ******************************************************************************/
74void bl31_main(void)
75{
Achin Gupta35ca3512014-02-19 17:58:33 +000076#if DEBUG
77 unsigned long mpidr = read_mpidr();
78#endif
Achin Gupta4f6ad662013-10-25 09:08:21 +010079
80 /* Perform remaining generic architectural setup from EL3 */
81 bl31_arch_setup();
82
83 /* Perform platform setup in BL1 */
84 bl31_platform_setup();
85
86#if defined (__GNUC__)
87 printf("BL31 Built : %s, %s\n\r", __TIME__, __DATE__);
88#endif
Achin Gupta7aea9082014-02-01 07:51:28 +000089 /* Initialise helper libraries */
90 bl31_lib_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +010091
92 /* Initialize the runtime services e.g. psci */
Achin Gupta7421b462014-02-01 18:53:26 +000093 runtime_svc_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +010094
95 /* Clean caches before re-entering normal world */
96 dcsw_op_all(DCCSW);
97
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000098 /*
Achin Gupta35ca3512014-02-19 17:58:33 +000099 * Use the more complex exception vectors now that context
100 * management is setup. SP_EL3 should point to a 'cpu_context'
101 * structure which has an exception stack allocated. The PSCI
102 * service should have set the context.
103 */
104 assert(cm_get_context(mpidr, NON_SECURE));
105 cm_set_next_eret_context(NON_SECURE);
106 write_vbar_el3((uint64_t) runtime_exceptions);
107
108 /*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000109 * All the cold boot actions on the primary cpu are done. We now need to
110 * decide which is the next image (BL32 or BL33) and how to execute it.
111 * If the SPD runtime service is present, it would want to pass control
112 * to BL32 first in S-EL1. In that case, SPD would have registered a
113 * function to intialize bl32 where it takes responsibility of entering
114 * S-EL1 and returning control back to bl31_main. Once this is done we
115 * can prepare entry into BL33 as normal.
Achin Gupta35ca3512014-02-19 17:58:33 +0000116 */
117
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000118 /*
119 * If SPD had registerd an init hook, invoke it. Pass it the information
120 * about memory extents
121 */
Achin Gupta35ca3512014-02-19 17:58:33 +0000122 if (bl32_init)
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000123 (*bl32_init)(bl31_plat_get_bl32_mem_layout());
Achin Gupta35ca3512014-02-19 17:58:33 +0000124
125 /*
126 * We are ready to enter the next EL. Prepare entry into the image
127 * corresponding to the desired security state after the next ERET.
128 */
129 bl31_prepare_next_image_entry();
130}
131
132/*******************************************************************************
133 * Accessor functions to help runtime services decide which image should be
134 * executed after BL31. This is BL33 or the non-secure bootloader image by
135 * default but the Secure payload dispatcher could override this by requesting
136 * an entry into BL32 (Secure payload) first. If it does so then it should use
137 * the same API to program an entry into BL33 once BL32 initialisation is
138 * complete.
139 ******************************************************************************/
140void bl31_set_next_image_type(uint32_t security_state)
141{
142 assert(security_state == NON_SECURE || security_state == SECURE);
143 next_image_type = security_state;
144}
145
146uint32_t bl31_get_next_image_type(void)
147{
148 return next_image_type;
149}
150
151/*******************************************************************************
152 * This function programs EL3 registers and performs other setup to enable entry
153 * into the next image after BL31 at the next ERET.
154 ******************************************************************************/
155void bl31_prepare_next_image_entry()
156{
157 el_change_info *next_image_info;
158 uint32_t scr, image_type;
159
160 /* Determine which image to execute next */
161 image_type = bl31_get_next_image_type();
162
163 /*
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000164 * Setup minimal architectural state of the next highest EL to
165 * allow execution in it immediately upon entering it.
166 */
Achin Gupta35ca3512014-02-19 17:58:33 +0000167 bl31_next_el_arch_setup(image_type);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000168
169 /* Program EL3 registers to enable entry into the next EL */
Achin Gupta35ca3512014-02-19 17:58:33 +0000170 next_image_info = bl31_get_next_image_info(image_type);
171 assert(next_image_info);
172
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000173 scr = read_scr();
Achin Gupta35ca3512014-02-19 17:58:33 +0000174 if (image_type == NON_SECURE)
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000175 scr |= SCR_NS_BIT;
176
177 /*
178 * Tell the context mgmt. library to ensure that SP_EL3 points to
179 * the right context to exit from EL3 correctly.
180 */
181 cm_set_el3_eret_context(next_image_info->security_state,
182 next_image_info->entrypoint,
183 next_image_info->spsr,
184 scr);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100185
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000186 /* Finally set the next context */
187 cm_set_next_eret_context(next_image_info->security_state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100188}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000189
190/*******************************************************************************
191 * This function initializes the pointer to BL32 init function. This is expected
192 * to be called by the SPD after it finishes all its initialization
193 ******************************************************************************/
194void bl31_register_bl32_init(int32_t (*func)(meminfo *))
195{
196 bl32_init = func;
197}