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Yatharth Kochara65be2f2015-10-09 18:06:13 +01001/*
Antonio Nino Diaz864ca6f2018-10-31 15:25:35 +00002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Yatharth Kochara65be2f2015-10-09 18:06:13 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Yatharth Kochara65be2f2015-10-09 18:06:13 +01005 */
6
Yatharth Kochara65be2f2015-10-09 18:06:13 +01007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
9#include <arch_helpers.h>
Yatharth Kochara65be2f2015-10-09 18:06:13 +010010#include <context.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <common/debug.h>
12#include <lib/el3_runtime/context_mgmt.h>
13#include <plat/common/platform.h>
14
Etienne Carriereba7c3d52017-06-07 16:41:50 +020015#include "../bl1_private.h"
Yatharth Kochara65be2f2015-10-09 18:06:13 +010016
17/*
18 * Following array will be used for context management.
19 * There are 2 instances, for the Secure and Non-Secure contexts.
20 */
21static cpu_context_t bl1_cpu_context[2];
22
23/* Following contains the cpu context pointers. */
24static void *bl1_cpu_context_ptr[2];
25
26
27void *cm_get_context(uint32_t security_state)
28{
29 assert(sec_state_is_valid(security_state));
30 return bl1_cpu_context_ptr[security_state];
31}
32
33void cm_set_context(void *context, uint32_t security_state)
34{
35 assert(sec_state_is_valid(security_state));
36 bl1_cpu_context_ptr[security_state] = context;
37}
38
39/*******************************************************************************
40 * This function prepares the context for Secure/Normal world images.
41 * Normal world images are transitioned to EL2(if supported) else EL1.
42 ******************************************************************************/
43void bl1_prepare_next_image(unsigned int image_id)
44{
John Tsichritzisa533ae72019-07-01 14:27:33 +010045 unsigned int security_state, mode = MODE_EL1;
Yatharth Kochara65be2f2015-10-09 18:06:13 +010046 image_desc_t *image_desc;
47 entry_point_info_t *next_bl_ep;
48
Soby Mathewd75d2ba2016-05-17 14:01:32 +010049#if CTX_INCLUDE_AARCH32_REGS
50 /*
51 * Ensure that the build flag to save AArch32 system registers in CPU
52 * context is not set for AArch64-only platforms.
53 */
Antonio Nino Diaz864ca6f2018-10-31 15:25:35 +000054 if (el_implemented(1) == EL_IMPL_A64ONLY) {
Soby Mathewd75d2ba2016-05-17 14:01:32 +010055 ERROR("EL1 supports AArch64-only. Please set build flag "
Antonio Nino Diaz864ca6f2018-10-31 15:25:35 +000056 "CTX_INCLUDE_AARCH32_REGS = 0\n");
Soby Mathewd75d2ba2016-05-17 14:01:32 +010057 panic();
58 }
59#endif
60
Yatharth Kochara65be2f2015-10-09 18:06:13 +010061 /* Get the image descriptor. */
62 image_desc = bl1_plat_get_image_desc(image_id);
63 assert(image_desc);
64
65 /* Get the entry point info. */
66 next_bl_ep = &image_desc->ep_info;
67
68 /* Get the image security state. */
Yatharth Kocharf11b29a2016-02-01 11:04:46 +000069 security_state = GET_SECURITY_STATE(next_bl_ep->h.attr);
Yatharth Kochara65be2f2015-10-09 18:06:13 +010070
71 /* Setup the Secure/Non-Secure context if not done already. */
72 if (!cm_get_context(security_state))
73 cm_set_context(&bl1_cpu_context[security_state], security_state);
74
75 /* Prepare the SPSR for the next BL image. */
John Tsichritzisa533ae72019-07-01 14:27:33 +010076 if ((security_state != SECURE) && (el_implemented(2) != EL_IMPL_NONE)) {
77 mode = MODE_EL2;
Yatharth Kochara65be2f2015-10-09 18:06:13 +010078 }
79
John Tsichritzisa533ae72019-07-01 14:27:33 +010080 next_bl_ep->spsr = SPSR_64(mode, MODE_SP_ELX,
81 DISABLE_ALL_EXCEPTIONS);
82
Yatharth Kochara65be2f2015-10-09 18:06:13 +010083 /* Allow platform to make change */
84 bl1_plat_set_ep_info(image_id, next_bl_ep);
85
86 /* Prepare the context for the next BL image. */
87 cm_init_my_context(next_bl_ep);
88 cm_prepare_el3_exit(security_state);
89
90 /* Indicate that image is in execution state. */
91 image_desc->state = IMAGE_STATE_EXECUTED;
92
93 print_entry_point_info(next_bl_ep);
94}