blob: 8f0159239900c147bbc9127a0cab07a1a2737fd1 [file] [log] [blame]
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +05301/*
Chandni Cherukuric873efc2023-02-16 20:22:32 +05302 * Copyright (c) 2020-2023, Arm Limited. All rights reserved.
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +05307#include <drivers/arm/css/css_mhu_doorbell.h>
8#include <drivers/arm/css/scmi.h>
Chandni Cherukuric873efc2023-02-16 20:22:32 +05309#include <drivers/arm/css/sds.h>
10#include <lib/smccc.h>
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +053011#include <plat/arm/common/plat_arm.h>
Chandni Cherukuric873efc2023-02-16 20:22:32 +053012#include <services/arm_arch_svc.h>
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +053013
14#include "morello_def.h"
15#include <platform_def.h>
16
Chandni Cherukuric873efc2023-02-16 20:22:32 +053017#ifdef TARGET_PLATFORM_FVP
18/*
19 * Platform information structure stored in SDS.
20 * This structure holds information about platform's DDR
21 * size
22 * - Local DDR size in bytes, DDR memory in main board
23 */
24struct morello_plat_info {
25 uint64_t local_ddr_size;
26} __packed;
27#else
28/*
29 * Platform information structure stored in SDS.
30 * This structure holds information about platform's DDR
31 * size which is an information about multichip setup
32 * - Local DDR size in bytes, DDR memory in main board
33 * - Remote DDR size in bytes, DDR memory in remote board
34 * - remote_chip_count
35 * - multichip mode
36 * - scc configuration
37 * - silicon revision
38 */
39struct morello_plat_info {
40 uint64_t local_ddr_size;
41 uint64_t remote_ddr_size;
42 uint8_t remote_chip_count;
43 bool multichip_mode;
44 uint32_t scc_config;
45 uint32_t silicon_revision;
46} __packed;
47
48struct morello_plat_info plat_info;
49#endif
50
51/* Compile time assertion to ensure the size of structure is of the required bytes */
52CASSERT(sizeof(struct morello_plat_info) == MORELLO_SDS_PLATFORM_INFO_SIZE,
53 assert_invalid_plat_info_size);
54
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +053055static scmi_channel_plat_info_t morello_scmi_plat_info = {
56 .scmi_mbx_mem = MORELLO_SCMI_PAYLOAD_BASE,
57 .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF,
58 .db_preserve_mask = 0xfffffffe,
59 .db_modify_mask = 0x1,
60 .ring_doorbell = &mhu_ring_doorbell
61};
62
Tony K Nadackal1b116a82022-12-07 20:44:05 +000063scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id)
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +053064{
65 return &morello_scmi_plat_info;
66}
67
68const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
69{
70 return css_scmi_override_pm_ops(ops);
71}
72
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +053073void bl31_platform_setup(void)
74{
Chandni Cherukuric873efc2023-02-16 20:22:32 +053075#ifdef TARGET_PLATFORM_SOC
76 int ret;
77
78 ret = sds_init();
79 if (ret != SDS_OK) {
80 ERROR("SDS initialization failed. ret:%d\n", ret);
81 panic();
82 }
83
84 ret = sds_struct_read(MORELLO_SDS_PLATFORM_INFO_STRUCT_ID,
85 MORELLO_SDS_PLATFORM_INFO_OFFSET,
86 &plat_info,
87 MORELLO_SDS_PLATFORM_INFO_SIZE,
88 SDS_ACCESS_MODE_NON_CACHED);
89 if (ret != SDS_OK) {
90 ERROR("Error getting platform info from SDS. ret:%d\n", ret);
91 panic();
92 }
93#endif
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +053094 arm_bl31_platform_setup();
Chandni Cherukurif3a6cab2020-09-22 18:56:25 +053095}
Chandni Cherukuric873efc2023-02-16 20:22:32 +053096
97#ifdef TARGET_PLATFORM_SOC
98/*****************************************************************************
99 * plat_is_smccc_feature_available() - This function checks whether SMCCC
100 * feature is availabile for platform.
101 * @fid: SMCCC function id
102 *
103 * Return SMC_ARCH_CALL_SUCCESS if SMCCC feature is available and
104 * SMC_ARCH_CALL_NOT_SUPPORTED otherwise.
105 *****************************************************************************/
106int32_t plat_is_smccc_feature_available(u_register_t fid)
107{
108 switch (fid) {
109 case SMCCC_ARCH_SOC_ID:
110 return SMC_ARCH_CALL_SUCCESS;
111 default:
112 return SMC_ARCH_CALL_NOT_SUPPORTED;
113 }
114}
115
116/* Get SOC version */
117int32_t plat_get_soc_version(void)
118{
119 int ssc_version;
120
121 ssc_version = mmio_read_32(SSC_VERSION);
122
123 return (int32_t)
124 (SOC_ID_SET_JEP_106(ARM_SOC_CONTINUATION_CODE,
125 ARM_SOC_IDENTIFICATION_CODE) |
126 (GET_SSC_VERSION_PART_NUM(ssc_version) & SOC_ID_IMPL_DEF_MASK));
127}
128
129/* Get SOC revision */
130int32_t plat_get_soc_revision(void)
131{
132 return (int32_t)plat_info.silicon_revision;
133}
134#endif