blob: f3d58a9f9ce8fd46075abc48584d16073049fa1b [file] [log] [blame]
Sumit Garg82d45c12018-06-15 13:41:59 +05301/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <arch_helpers.h>
9#include <platform_def.h>
10#include <assert.h>
11#include <bl_common.h>
Sumit Garg84711f92018-06-15 14:34:42 +053012#include <pl011.h>
Sumit Garg82d45c12018-06-15 13:41:59 +053013#include <debug.h>
Sumit Gargbda9d3c2018-06-15 14:50:19 +053014#include <sq_common.h>
Sumit Garg82d45c12018-06-15 13:41:59 +053015
Sumit Garg84711f92018-06-15 14:34:42 +053016static console_pl011_t console;
Sumit Garge8c5e872018-06-15 14:38:50 +053017static entry_point_info_t bl32_image_ep_info;
18static entry_point_info_t bl33_image_ep_info;
19
20entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
21{
22 assert(sec_state_is_valid(type));
23 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info;
24}
25
26/*******************************************************************************
27 * Gets SPSR for BL32 entry
28 ******************************************************************************/
29uint32_t sq_get_spsr_for_bl32_entry(void)
30{
31 /*
32 * The Secure Payload Dispatcher service is responsible for
33 * setting the SPSR prior to entry into the BL32 image.
34 */
35 return 0;
36}
37
38/*******************************************************************************
39 * Gets SPSR for BL33 entry
40 ******************************************************************************/
41uint32_t sq_get_spsr_for_bl33_entry(void)
42{
43 unsigned long el_status;
44 unsigned int mode;
45 uint32_t spsr;
46
47 /* Figure out what mode we enter the non-secure world in */
48 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
49 el_status &= ID_AA64PFR0_ELX_MASK;
50
51 mode = (el_status) ? MODE_EL2 : MODE_EL1;
52
53 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
54 return spsr;
55}
Sumit Garg84711f92018-06-15 14:34:42 +053056
Sumit Garg82d45c12018-06-15 13:41:59 +053057void bl31_early_platform_setup(bl31_params_t *from_bl2,
58 void *plat_params_from_bl2)
59{
Sumit Garg84711f92018-06-15 14:34:42 +053060 /* Initialize the console to provide early debug support */
61 (void)console_pl011_register(PLAT_SQ_BOOT_UART_BASE,
62 PLAT_SQ_BOOT_UART_CLK_IN_HZ,
63 SQ_CONSOLE_BAUDRATE, &console);
64
65 console_set_scope(&console.console, CONSOLE_FLAG_BOOT |
66 CONSOLE_FLAG_RUNTIME);
67
Sumit Garg82d45c12018-06-15 13:41:59 +053068 /* There are no parameters from BL2 if BL31 is a reset vector */
69 assert(from_bl2 == NULL);
70 assert(plat_params_from_bl2 == NULL);
Sumit Garge8c5e872018-06-15 14:38:50 +053071
72#ifdef BL32_BASE
73 /* Populate entry point information for BL32 */
74 SET_PARAM_HEAD(&bl32_image_ep_info,
75 PARAM_EP,
76 VERSION_1,
77 0);
78 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
79 bl32_image_ep_info.pc = BL32_BASE;
80 bl32_image_ep_info.spsr = sq_get_spsr_for_bl32_entry();
81#endif /* BL32_BASE */
82
83 /* Populate entry point information for BL33 */
84 SET_PARAM_HEAD(&bl33_image_ep_info,
85 PARAM_EP,
86 VERSION_1,
87 0);
88 /*
89 * Tell BL31 where the non-trusted software image
90 * is located and the entry state information
91 */
92 bl33_image_ep_info.pc = PRELOADED_BL33_BASE;
93 bl33_image_ep_info.spsr = sq_get_spsr_for_bl33_entry();
94 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
Sumit Garg82d45c12018-06-15 13:41:59 +053095}
96
97void bl31_platform_setup(void)
98{
Sumit Gargbda9d3c2018-06-15 14:50:19 +053099 /* Initialize the CCN interconnect */
100 plat_sq_interconnect_init();
101 plat_sq_interconnect_enter_coherency();
Sumit Garg82d45c12018-06-15 13:41:59 +0530102}
103
104void bl31_plat_runtime_setup(void)
105{
106}
107
108void bl31_plat_arch_setup(void)
109{
110}