| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <console.h> |
| 32 | #include <tegra_def.h> |
| 33 | #include <xlat_tables.h> |
| 34 | |
| 35 | /* |
| 36 | * Table of regions to map using the MMU. |
| 37 | */ |
| 38 | static const mmap_region_t tegra_mmap[] = { |
| 39 | MAP_REGION_FLAT(TEGRA_MISC_BASE, 0x10000, /* 64KB */ |
| 40 | MT_DEVICE | MT_RW | MT_SECURE), |
| 41 | MAP_REGION_FLAT(TEGRA_MC_STREAMID_BASE, 0x10000, /* 64KB */ |
| 42 | MT_DEVICE | MT_RW | MT_SECURE), |
| 43 | MAP_REGION_FLAT(TEGRA_MC_BASE, 0x10000, /* 64KB */ |
| 44 | MT_DEVICE | MT_RW | MT_SECURE), |
| 45 | MAP_REGION_FLAT(TEGRA_UARTA_BASE, 0x20000, /* 128KB */ |
| 46 | MT_DEVICE | MT_RW | MT_SECURE), |
| 47 | MAP_REGION_FLAT(TEGRA_GICD_BASE, 0x20000, /* 128KB */ |
| 48 | MT_DEVICE | MT_RW | MT_SECURE), |
| 49 | MAP_REGION_FLAT(TEGRA_PMC_BASE, 0x40000, /* 256KB */ |
| 50 | MT_DEVICE | MT_RW | MT_SECURE), |
| 51 | MAP_REGION_FLAT(TEGRA_MMCRAB_BASE, 0x60000, /* 384KB */ |
| 52 | MT_DEVICE | MT_RW | MT_SECURE), |
| 53 | MAP_REGION_FLAT(TEGRA_SMMU_BASE, 0x10000, /* 64KB */ |
| 54 | MT_DEVICE | MT_RW | MT_SECURE), |
| 55 | {0} |
| 56 | }; |
| 57 | |
| 58 | /******************************************************************************* |
| 59 | * Set up the pagetables as per the platform memory map & initialize the MMU |
| 60 | ******************************************************************************/ |
| 61 | const mmap_region_t *plat_get_mmio_map(void) |
| 62 | { |
| 63 | /* MMIO space */ |
| 64 | return tegra_mmap; |
| 65 | } |
| 66 | |
| 67 | /******************************************************************************* |
| 68 | * Handler to get the System Counter Frequency |
| 69 | ******************************************************************************/ |
| 70 | unsigned int plat_get_syscnt_freq2(void) |
| 71 | { |
| Varun Wadekar | 20c9429 | 2016-01-04 10:57:45 -0800 | [diff] [blame] | 72 | return 31250000; |
| Varun Wadekar | 921b906 | 2015-08-25 17:03:14 +0530 | [diff] [blame] | 73 | } |
| 74 | |
| 75 | /******************************************************************************* |
| 76 | * Maximum supported UART controllers |
| 77 | ******************************************************************************/ |
| 78 | #define TEGRA186_MAX_UART_PORTS 7 |
| 79 | |
| 80 | /******************************************************************************* |
| 81 | * This variable holds the UART port base addresses |
| 82 | ******************************************************************************/ |
| 83 | static uint32_t tegra186_uart_addresses[TEGRA186_MAX_UART_PORTS + 1] = { |
| 84 | 0, /* undefined - treated as an error case */ |
| 85 | TEGRA_UARTA_BASE, |
| 86 | TEGRA_UARTB_BASE, |
| 87 | TEGRA_UARTC_BASE, |
| 88 | TEGRA_UARTD_BASE, |
| 89 | TEGRA_UARTE_BASE, |
| 90 | TEGRA_UARTF_BASE, |
| 91 | TEGRA_UARTG_BASE, |
| 92 | }; |
| 93 | |
| 94 | /******************************************************************************* |
| 95 | * Retrieve the UART controller base to be used as the console |
| 96 | ******************************************************************************/ |
| 97 | uint32_t plat_get_console_from_id(int id) |
| 98 | { |
| 99 | if (id > TEGRA186_MAX_UART_PORTS) |
| 100 | return 0; |
| 101 | |
| 102 | return tegra186_uart_addresses[id]; |
| 103 | } |