blob: ff83db3614f938c49afd0ab5bdc382df4526b406 [file] [log] [blame]
Louis Mayencourt6d2b5732019-12-17 13:17:25 +00001/*
2 * Copyright (c) 2019-2020, ARM Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <export/common/tbbr/tbbr_img_def_exp.h>
8
9/dts-v1/;
10
11/ {
12 dtb-registry {
13 compatible = "arm,dyn_cfg-dtb_registry";
14
15 /* tb_fw_config is temporarily contained on this dtb */
16 tb_fw-config {
17 load-address = <0x0 0x4001010>;
18 max-size = <0x200>;
19 id = <TB_FW_CONFIG_ID>;
20 };
21
22 hw-config {
23 load-address = <0x0 0x82000000>;
24 max-size = <0x01000000>;
25 id = <HW_CONFIG_ID>;
26 };
27
28 /*
29 * Load SoC and TOS firmware configs at the base of
30 * non shared SRAM. The runtime checks ensure we don't
31 * overlap BL2, BL31 or BL32. The NT firmware config
32 * is loaded at base of DRAM.
33 */
34 soc_fw-config {
35 load-address = <0x0 0x04001000>;
36 max-size = <0x200>;
37 id = <SOC_FW_CONFIG_ID>;
38 };
39
40 tos_fw-config {
41 load-address = <0x0 0x04001200>;
42 max-size = <0x200>;
43 id = <TOS_FW_CONFIG_ID>;
44 };
45
46 nt_fw-config {
47 load-address = <0x0 0x80000000>;
48 max-size = <0x200>;
49 id = <NT_FW_CONFIG_ID>;
50 };
51 };
52
53 tb_fw-config {
54 compatible = "arm,tb_fw";
55
56 /* Disable authentication for development */
57 disable_auth = <0x0>;
58
59 /*
60 * The following two entries are placeholders for Mbed TLS
61 * heap information. The default values don't matter since
62 * they will be overwritten by BL1.
63 * In case of having shared Mbed TLS heap between BL1 and BL2,
64 * BL1 will populate these two properties with the respective
65 * info about the shared heap. This info will be available for
66 * BL2 in order to locate and re-use the heap.
67 */
68 mbedtls_heap_addr = <0x0 0x0>;
69 mbedtls_heap_size = <0x0>;
70 };
71};