blob: d8a68cf622e8957ac8933a9396f1f1d606febbfb [file] [log] [blame]
Haojian Zhuang5f281b32017-05-24 08:45:05 +08001/*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch_helpers.h>
8#include <arm_gic.h>
9#include <assert.h>
10#include <bl_common.h>
11#include <debug.h>
12#include <mmio.h>
13#include <platform.h>
14#include <platform_def.h>
15#include <xlat_tables.h>
16
17#include "../hikey_def.h"
18
19#define MAP_DDR MAP_REGION_FLAT(DDR_BASE, \
20 DDR_SIZE, \
21 MT_DEVICE | MT_RW | MT_NS)
22
23#define MAP_DEVICE MAP_REGION_FLAT(DEVICE_BASE, \
24 DEVICE_SIZE, \
25 MT_DEVICE | MT_RW | MT_SECURE)
26
27#define MAP_ROM_PARAM MAP_REGION_FLAT(XG2RAM0_BASE, \
28 BL1_XG2RAM0_OFFSET, \
29 MT_DEVICE | MT_RO | MT_SECURE)
30
31#define MAP_SRAM MAP_REGION_FLAT(SRAM_BASE, \
32 SRAM_SIZE, \
33 MT_DEVICE | MT_RW | MT_SECURE)
34
35/*
36 * BL1 needs to access the areas of MMC_SRAM.
37 * BL1 loads BL2 from eMMC into SRAM before DDR initialized.
38 */
39#define MAP_MMC_SRAM MAP_REGION_FLAT(HIKEY_BL1_MMC_DESC_BASE, \
40 HIKEY_BL1_MMC_DESC_SIZE + \
41 HIKEY_BL1_MMC_DATA_SIZE, \
42 MT_DEVICE | MT_RW | MT_SECURE)
43
44/*
45 * Table of regions for different BL stages to map using the MMU.
46 * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
47 * hikey_init_mmu_elx() will give the available subset of that,
48 */
49#if IMAGE_BL1
50static const mmap_region_t hikey_mmap[] = {
51 MAP_DEVICE,
52 MAP_ROM_PARAM,
53 MAP_MMC_SRAM,
54 {0}
55};
56#endif
57
58#if IMAGE_BL2
59static const mmap_region_t hikey_mmap[] = {
60 MAP_DDR,
61 MAP_DEVICE,
62 {0}
63};
64#endif
65
66#if IMAGE_BL31
67static const mmap_region_t hikey_mmap[] = {
68 MAP_DEVICE,
69 MAP_SRAM,
70 {0}
71};
72#endif
73
74/*
75 * Macro generating the code for the function setting up the pagetables as per
76 * the platform memory map & initialize the mmu, for the given exception level
77 */
78#define HIKEY_CONFIGURE_MMU_EL(_el) \
79 void hikey_init_mmu_el##_el(unsigned long total_base, \
80 unsigned long total_size, \
81 unsigned long ro_start, \
82 unsigned long ro_limit, \
83 unsigned long coh_start, \
84 unsigned long coh_limit) \
85 { \
86 mmap_add_region(total_base, total_base, \
87 total_size, \
88 MT_MEMORY | MT_RW | MT_SECURE); \
89 mmap_add_region(ro_start, ro_start, \
90 ro_limit - ro_start, \
91 MT_MEMORY | MT_RO | MT_SECURE); \
92 mmap_add_region(coh_start, coh_start, \
93 coh_limit - coh_start, \
94 MT_DEVICE | MT_RW | MT_SECURE); \
95 mmap_add(hikey_mmap); \
96 init_xlat_tables(); \
97 \
98 enable_mmu_el##_el(0); \
99 }
100
101/* Define EL1 and EL3 variants of the function initialising the MMU */
102HIKEY_CONFIGURE_MMU_EL(1)
103HIKEY_CONFIGURE_MMU_EL(3)
104
105unsigned long plat_get_ns_image_entrypoint(void)
106{
107 return HIKEY_NS_IMAGE_OFFSET;
108}
109
110unsigned int plat_get_syscnt_freq2(void)
111{
112 return 1200000;
113}