Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 1 | # Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved. |
| 2 | # Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. |
| 3 | # Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. |
| 4 | # |
| 5 | # SPDX-License-Identifier: BSD-3-Clause |
| 6 | |
| 7 | PLAT_PATH := plat/xilinx/versal_net |
| 8 | |
| 9 | override PROGRAMMABLE_RESET_ADDRESS := 1 |
| 10 | PSCI_EXTENDED_STATE_ID := 1 |
| 11 | SEPARATE_CODE_AND_RODATA := 1 |
| 12 | override RESET_TO_BL31 := 1 |
| 13 | PL011_GENERIC_UART := 1 |
| 14 | GIC_ENABLE_V4_EXTN := 0 |
| 15 | GICV3_SUPPORT_GIC600 := 1 |
| 16 | |
| 17 | override CTX_INCLUDE_AARCH32_REGS := 0 |
| 18 | |
| 19 | ifdef VERSAL_NET_ATF_MEM_BASE |
| 20 | $(eval $(call add_define,VERSAL_NET_ATF_MEM_BASE)) |
| 21 | |
| 22 | ifndef VERSAL_NET_ATF_MEM_SIZE |
| 23 | $(error "VERSAL_NET_ATF_BASE defined without VERSAL_NET_ATF_SIZE") |
| 24 | endif |
| 25 | $(eval $(call add_define,VERSAL_NET_ATF_MEM_SIZE)) |
| 26 | |
| 27 | ifdef VERSAL_NET_ATF_MEM_PROGBITS_SIZE |
| 28 | $(eval $(call add_define,VERSAL_NET_ATF_MEM_PROGBITS_SIZE)) |
| 29 | endif |
| 30 | endif |
| 31 | |
| 32 | ifdef VERSAL_NET_BL32_MEM_BASE |
| 33 | $(eval $(call add_define,VERSAL_NET_BL32_MEM_BASE)) |
| 34 | |
| 35 | ifndef VERSAL_NET_BL32_MEM_SIZE |
| 36 | $(error "VERSAL_NET_BL32_BASE defined without VERSAL_NET_BL32_SIZE") |
| 37 | endif |
| 38 | $(eval $(call add_define,VERSAL_NET_BL32_MEM_SIZE)) |
| 39 | endif |
| 40 | |
| 41 | USE_COHERENT_MEM := 0 |
| 42 | HW_ASSISTED_COHERENCY := 1 |
| 43 | |
| 44 | VERSAL_NET_CONSOLE ?= pl011 |
| 45 | $(eval $(call add_define_val,VERSAL_NET_CONSOLE,VERSAL_NET_CONSOLE_ID_${VERSAL_NET_CONSOLE})) |
| 46 | |
| 47 | PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ |
| 48 | -Iplat/xilinx/common/include/ \ |
Michal Simek | dc708ac | 2022-09-19 13:52:54 +0200 | [diff] [blame^] | 49 | -I${PLAT_PATH}/include/ \ |
| 50 | -Iplat/xilinx/versal/pm_service/ |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 51 | |
| 52 | # Include GICv3 driver files |
| 53 | include drivers/arm/gic/v3/gicv3.mk |
| 54 | include lib/xlat_tables_v2/xlat_tables.mk |
| 55 | include lib/libfdt/libfdt.mk |
| 56 | |
| 57 | PLAT_BL_COMMON_SOURCES := \ |
| 58 | drivers/delay_timer/delay_timer.c \ |
| 59 | drivers/delay_timer/generic_delay_timer.c \ |
| 60 | ${GICV3_SOURCES} \ |
| 61 | drivers/arm/pl011/aarch64/pl011_console.S \ |
| 62 | plat/arm/common/arm_common.c \ |
| 63 | plat/common/plat_gicv3.c \ |
| 64 | ${PLAT_PATH}/aarch64/versal_net_helpers.S \ |
| 65 | ${PLAT_PATH}/aarch64/versal_net_common.c |
| 66 | |
| 67 | BL31_SOURCES += drivers/arm/cci/cci.c \ |
| 68 | lib/cpus/aarch64/cortex_a78_ae.S \ |
| 69 | lib/cpus/aarch64/cortex_a78.S \ |
| 70 | plat/common/plat_psci_common.c \ |
| 71 | ${PLAT_PATH}/plat_psci.c \ |
| 72 | plat/xilinx/common/plat_startup.c \ |
| 73 | ${PLAT_PATH}/bl31_versal_net_setup.c \ |
| 74 | ${PLAT_PATH}/plat_topology.c \ |
| 75 | common/fdt_fixup.c \ |
| 76 | ${LIBFDT_SRCS} \ |
| 77 | ${PLAT_PATH}/sip_svc_setup.c \ |
| 78 | ${PLAT_PATH}/versal_net_gicv3.c \ |
| 79 | ${XLAT_TABLES_LIB_SRCS} |