Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 1 | /* |
Andre Przywara | 4ea3bd3 | 2019-07-09 14:32:11 +0100 | [diff] [blame] | 2 | * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Antonio Nino Diaz | 9abd78d | 2018-07-11 21:00:32 +0100 | [diff] [blame] | 7 | #include <assert.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 8 | |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 9 | #include <platform_def.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 10 | |
| 11 | #include <arch_helpers.h> |
| 12 | #include <common/bl_common.h> |
| 13 | #include <common/debug.h> |
| 14 | #include <bl31/interrupt_mgmt.h> |
| 15 | #include <drivers/console.h> |
| 16 | #include <drivers/ti/uart/uart_16550.h> |
Andre Przywara | 9ba6bb0 | 2020-03-10 12:34:56 +0000 | [diff] [blame] | 17 | #include <drivers/arm/pl011.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 18 | #include <lib/xlat_tables/xlat_tables_v2.h> |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 19 | |
Andre Przywara | bb6ef15 | 2019-07-09 11:44:14 +0100 | [diff] [blame] | 20 | #include <rpi_hw.h> |
Andre Przywara | 4ea3bd3 | 2019-07-09 14:32:11 +0100 | [diff] [blame] | 21 | #include <rpi_shared.h> |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 22 | |
| 23 | #define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \ |
| 24 | DEVICE0_SIZE, \ |
| 25 | MT_DEVICE | MT_RW | MT_SECURE) |
| 26 | |
Andre Przywara | 0467ce9 | 2019-07-15 08:58:23 +0100 | [diff] [blame] | 27 | #ifdef SHARED_RAM_BASE |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 28 | #define MAP_SHARED_RAM MAP_REGION_FLAT(SHARED_RAM_BASE, \ |
| 29 | SHARED_RAM_SIZE, \ |
Antonio Nino Diaz | f96582a | 2018-10-19 00:57:16 +0100 | [diff] [blame] | 30 | MT_DEVICE | MT_RW | MT_SECURE) |
Andre Przywara | 0467ce9 | 2019-07-15 08:58:23 +0100 | [diff] [blame] | 31 | #endif |
Antonio Nino Diaz | f96582a | 2018-10-19 00:57:16 +0100 | [diff] [blame] | 32 | |
| 33 | #ifdef RPI3_PRELOADED_DTB_BASE |
| 34 | #define MAP_NS_DTB MAP_REGION_FLAT(RPI3_PRELOADED_DTB_BASE, 0x10000, \ |
| 35 | MT_MEMORY | MT_RW | MT_NS) |
| 36 | #endif |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 37 | |
| 38 | #define MAP_NS_DRAM0 MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE, \ |
| 39 | MT_MEMORY | MT_RW | MT_NS) |
| 40 | |
| 41 | #define MAP_FIP MAP_REGION_FLAT(PLAT_RPI3_FIP_BASE, \ |
| 42 | PLAT_RPI3_FIP_MAX_SIZE, \ |
| 43 | MT_MEMORY | MT_RO | MT_NS) |
| 44 | |
| 45 | #define MAP_BL32_MEM MAP_REGION_FLAT(BL32_MEM_BASE, BL32_MEM_SIZE, \ |
| 46 | MT_MEMORY | MT_RW | MT_SECURE) |
| 47 | |
Ying-Chun Liu (PaulLiu) | d9f76e6 | 2018-06-10 02:00:27 +0800 | [diff] [blame] | 48 | #ifdef SPD_opteed |
| 49 | #define MAP_OPTEE_PAGEABLE MAP_REGION_FLAT( \ |
| 50 | RPI3_OPTEE_PAGEABLE_LOAD_BASE, \ |
| 51 | RPI3_OPTEE_PAGEABLE_LOAD_SIZE, \ |
| 52 | MT_MEMORY | MT_RW | MT_SECURE) |
| 53 | #endif |
| 54 | |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 55 | /* |
| 56 | * Table of regions for various BL stages to map using the MMU. |
| 57 | */ |
| 58 | #ifdef IMAGE_BL1 |
| 59 | static const mmap_region_t plat_rpi3_mmap[] = { |
Andre Przywara | 0467ce9 | 2019-07-15 08:58:23 +0100 | [diff] [blame] | 60 | #ifdef MAP_SHARED_RAM |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 61 | MAP_SHARED_RAM, |
Andre Przywara | 0467ce9 | 2019-07-15 08:58:23 +0100 | [diff] [blame] | 62 | #endif |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 63 | MAP_DEVICE0, |
| 64 | MAP_FIP, |
Ying-Chun Liu (PaulLiu) | d9f76e6 | 2018-06-10 02:00:27 +0800 | [diff] [blame] | 65 | #ifdef SPD_opteed |
| 66 | MAP_OPTEE_PAGEABLE, |
| 67 | #endif |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 68 | {0} |
| 69 | }; |
| 70 | #endif |
| 71 | |
| 72 | #ifdef IMAGE_BL2 |
| 73 | static const mmap_region_t plat_rpi3_mmap[] = { |
Andre Przywara | 0467ce9 | 2019-07-15 08:58:23 +0100 | [diff] [blame] | 74 | #ifdef MAP_SHARED_RAM |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 75 | MAP_SHARED_RAM, |
Andre Przywara | 0467ce9 | 2019-07-15 08:58:23 +0100 | [diff] [blame] | 76 | #endif |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 77 | MAP_DEVICE0, |
| 78 | MAP_FIP, |
| 79 | MAP_NS_DRAM0, |
| 80 | #ifdef BL32_BASE |
| 81 | MAP_BL32_MEM, |
| 82 | #endif |
| 83 | {0} |
| 84 | }; |
| 85 | #endif |
| 86 | |
| 87 | #ifdef IMAGE_BL31 |
| 88 | static const mmap_region_t plat_rpi3_mmap[] = { |
Andre Przywara | 0467ce9 | 2019-07-15 08:58:23 +0100 | [diff] [blame] | 89 | #ifdef MAP_SHARED_RAM |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 90 | MAP_SHARED_RAM, |
Andre Przywara | 0467ce9 | 2019-07-15 08:58:23 +0100 | [diff] [blame] | 91 | #endif |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 92 | MAP_DEVICE0, |
Antonio Nino Diaz | f96582a | 2018-10-19 00:57:16 +0100 | [diff] [blame] | 93 | #ifdef RPI3_PRELOADED_DTB_BASE |
| 94 | MAP_NS_DTB, |
| 95 | #endif |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 96 | #ifdef BL32_BASE |
| 97 | MAP_BL32_MEM, |
| 98 | #endif |
| 99 | {0} |
| 100 | }; |
| 101 | #endif |
| 102 | |
| 103 | /******************************************************************************* |
Antonio Nino Diaz | 1f47002 | 2018-03-27 09:39:47 +0100 | [diff] [blame] | 104 | * Function that sets up the console |
| 105 | ******************************************************************************/ |
Andre Przywara | 98b5a11 | 2020-01-25 00:58:35 +0000 | [diff] [blame] | 106 | static console_t rpi3_console; |
Antonio Nino Diaz | 1f47002 | 2018-03-27 09:39:47 +0100 | [diff] [blame] | 107 | |
Andre Przywara | 9ba6bb0 | 2020-03-10 12:34:56 +0000 | [diff] [blame] | 108 | static bool rpi3_use_mini_uart(void) |
| 109 | { |
| 110 | return true; |
| 111 | } |
| 112 | |
Andre Przywara | 57ccecc | 2020-03-10 12:33:16 +0000 | [diff] [blame] | 113 | void rpi3_console_init(void) |
Antonio Nino Diaz | 1f47002 | 2018-03-27 09:39:47 +0100 | [diff] [blame] | 114 | { |
Pete Batard | c9acd6c | 2018-11-13 13:14:26 +0000 | [diff] [blame] | 115 | int console_scope = CONSOLE_FLAG_BOOT; |
Andre Przywara | 57ccecc | 2020-03-10 12:33:16 +0000 | [diff] [blame] | 116 | int rc; |
| 117 | |
| 118 | if (RPI3_RUNTIME_UART != -1) |
| 119 | console_scope |= CONSOLE_FLAG_RUNTIME; |
| 120 | |
Andre Przywara | 9ba6bb0 | 2020-03-10 12:34:56 +0000 | [diff] [blame] | 121 | if (rpi3_use_mini_uart()) |
| 122 | rc = console_16550_register(PLAT_RPI_MINI_UART_BASE, |
| 123 | 0, |
| 124 | PLAT_RPI_UART_BAUDRATE, |
| 125 | &rpi3_console); |
| 126 | else |
| 127 | rc = console_pl011_register(PLAT_RPI_PL011_UART_BASE, |
| 128 | PLAT_RPI_PL011_UART_CLOCK, |
| 129 | PLAT_RPI_UART_BAUDRATE, |
| 130 | &rpi3_console); |
Andre Przywara | 57ccecc | 2020-03-10 12:33:16 +0000 | [diff] [blame] | 131 | |
Antonio Nino Diaz | 1f47002 | 2018-03-27 09:39:47 +0100 | [diff] [blame] | 132 | if (rc == 0) { |
| 133 | /* |
| 134 | * The crash console doesn't use the multi console API, it uses |
| 135 | * the core console functions directly. It is safe to call panic |
| 136 | * and let it print debug information. |
| 137 | */ |
| 138 | panic(); |
| 139 | } |
| 140 | |
Andre Przywara | 98b5a11 | 2020-01-25 00:58:35 +0000 | [diff] [blame] | 141 | console_set_scope(&rpi3_console, console_scope); |
Antonio Nino Diaz | 1f47002 | 2018-03-27 09:39:47 +0100 | [diff] [blame] | 142 | } |
| 143 | |
| 144 | /******************************************************************************* |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 145 | * Function that sets up the translation tables. |
| 146 | ******************************************************************************/ |
| 147 | void rpi3_setup_page_tables(uintptr_t total_base, size_t total_size, |
| 148 | uintptr_t code_start, uintptr_t code_limit, |
| 149 | uintptr_t rodata_start, uintptr_t rodata_limit |
| 150 | #if USE_COHERENT_MEM |
| 151 | , uintptr_t coh_start, uintptr_t coh_limit |
| 152 | #endif |
| 153 | ) |
| 154 | { |
| 155 | /* |
| 156 | * Map the Trusted SRAM with appropriate memory attributes. |
| 157 | * Subsequent mappings will adjust the attributes for specific regions. |
| 158 | */ |
| 159 | VERBOSE("Trusted SRAM seen by this BL image: %p - %p\n", |
| 160 | (void *) total_base, (void *) (total_base + total_size)); |
| 161 | mmap_add_region(total_base, total_base, |
| 162 | total_size, |
| 163 | MT_MEMORY | MT_RW | MT_SECURE); |
| 164 | |
| 165 | /* Re-map the code section */ |
| 166 | VERBOSE("Code region: %p - %p\n", |
| 167 | (void *) code_start, (void *) code_limit); |
| 168 | mmap_add_region(code_start, code_start, |
| 169 | code_limit - code_start, |
| 170 | MT_CODE | MT_SECURE); |
| 171 | |
| 172 | /* Re-map the read-only data section */ |
| 173 | VERBOSE("Read-only data region: %p - %p\n", |
| 174 | (void *) rodata_start, (void *) rodata_limit); |
| 175 | mmap_add_region(rodata_start, rodata_start, |
| 176 | rodata_limit - rodata_start, |
| 177 | MT_RO_DATA | MT_SECURE); |
| 178 | |
| 179 | #if USE_COHERENT_MEM |
| 180 | /* Re-map the coherent memory region */ |
| 181 | VERBOSE("Coherent region: %p - %p\n", |
| 182 | (void *) coh_start, (void *) coh_limit); |
| 183 | mmap_add_region(coh_start, coh_start, |
| 184 | coh_limit - coh_start, |
| 185 | MT_DEVICE | MT_RW | MT_SECURE); |
| 186 | #endif |
| 187 | |
| 188 | mmap_add(plat_rpi3_mmap); |
| 189 | |
| 190 | init_xlat_tables(); |
| 191 | } |
| 192 | |
| 193 | /******************************************************************************* |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 194 | * Gets SPSR for BL32 entry |
| 195 | ******************************************************************************/ |
| 196 | uint32_t rpi3_get_spsr_for_bl32_entry(void) |
| 197 | { |
| 198 | /* |
| 199 | * The Secure Payload Dispatcher service is responsible for |
| 200 | * setting the SPSR prior to entry into the BL32 image. |
| 201 | */ |
| 202 | return 0; |
| 203 | } |
| 204 | |
| 205 | /******************************************************************************* |
| 206 | * Gets SPSR for BL33 entry |
| 207 | ******************************************************************************/ |
| 208 | uint32_t rpi3_get_spsr_for_bl33_entry(void) |
| 209 | { |
| 210 | #if RPI3_BL33_IN_AARCH32 |
| 211 | INFO("BL33 will boot in Non-secure AArch32 Hypervisor mode\n"); |
| 212 | return SPSR_MODE32(MODE32_hyp, SPSR_T_ARM, SPSR_E_LITTLE, |
| 213 | DISABLE_ALL_EXCEPTIONS); |
| 214 | #else |
| 215 | return SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); |
| 216 | #endif |
| 217 | } |
| 218 | |
| 219 | unsigned int plat_get_syscnt_freq2(void) |
| 220 | { |
| 221 | return SYS_COUNTER_FREQ_IN_TICKS; |
| 222 | } |
| 223 | |
| 224 | uint32_t plat_ic_get_pending_interrupt_type(void) |
| 225 | { |
Antonio Nino Diaz | 9abd78d | 2018-07-11 21:00:32 +0100 | [diff] [blame] | 226 | ERROR("rpi3: Interrupt routed to EL3.\n"); |
Antonio Nino Diaz | ae6779e | 2017-11-06 14:49:04 +0000 | [diff] [blame] | 227 | return INTR_TYPE_INVAL; |
| 228 | } |
Ying-Chun Liu (PaulLiu) | d9f76e6 | 2018-06-10 02:00:27 +0800 | [diff] [blame] | 229 | |
Antonio Nino Diaz | 9abd78d | 2018-07-11 21:00:32 +0100 | [diff] [blame] | 230 | uint32_t plat_interrupt_type_to_line(uint32_t type, uint32_t security_state) |
Ying-Chun Liu (PaulLiu) | d9f76e6 | 2018-06-10 02:00:27 +0800 | [diff] [blame] | 231 | { |
Antonio Nino Diaz | 9abd78d | 2018-07-11 21:00:32 +0100 | [diff] [blame] | 232 | assert((type == INTR_TYPE_S_EL1) || (type == INTR_TYPE_EL3) || |
| 233 | (type == INTR_TYPE_NS)); |
| 234 | |
| 235 | assert(sec_state_is_valid(security_state)); |
| 236 | |
| 237 | /* Non-secure interrupts are signalled on the IRQ line always. */ |
| 238 | if (type == INTR_TYPE_NS) |
| 239 | return __builtin_ctz(SCR_IRQ_BIT); |
| 240 | |
| 241 | /* Secure interrupts are signalled on the FIQ line always. */ |
| 242 | return __builtin_ctz(SCR_FIQ_BIT); |
Ying-Chun Liu (PaulLiu) | d9f76e6 | 2018-06-10 02:00:27 +0800 | [diff] [blame] | 243 | } |