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Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
Michal Simek2a47faa2023-04-14 08:43:51 +02002 * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
Jay Buddhabhatti26e138a2022-12-21 23:03:35 -08003 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08004 *
dp-armfa3cf0b2017-05-03 09:38:09 +01005 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08006 */
7
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +05308#include <stdbool.h>
9#include <string.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <common/debug.h>
12#include <drivers/generic_delay_timer.h>
13#include <lib/mmio.h>
Michal Simekc98da1c2023-02-09 10:28:58 +010014#include <lib/smccc.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000015#include <lib/xlat_tables/xlat_tables.h>
Jolly Shah6a903472019-08-27 11:23:08 -070016#include <plat_ipi.h>
Jolly Shah0bfd7002019-01-08 11:10:47 -080017#include <plat_private.h>
Michal Simekc98da1c2023-02-09 10:28:58 +010018#include <plat_startup.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000019#include <plat/common/platform.h>
Michal Simekc98da1c2023-02-09 10:28:58 +010020#include <services/arm_arch_svc.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000021
Jay Buddhabhatti26e138a2022-12-21 23:03:35 -080022#include "zynqmp_pm_api_sys.h"
Soren Brinkmann76fcae32016-03-06 20:16:27 -080023
24/*
25 * Table of regions to map using the MMU.
26 * This doesn't include TZRAM as the 'mem_layout' argument passed to
27 * configure_mmu_elx() will give the available subset of that,
28 */
29const mmap_region_t plat_arm_mmap[] = {
30 { DEVICE0_BASE, DEVICE0_BASE, DEVICE0_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
31 { DEVICE1_BASE, DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
32 { CRF_APB_BASE, CRF_APB_BASE, CRF_APB_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
33 {0}
34};
35
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +053036static uint32_t zynqmp_get_silicon_ver(void)
Soren Brinkmann76fcae32016-03-06 20:16:27 -080037{
Soren Brinkmann85863992016-09-16 10:34:47 -070038 static unsigned int ver;
Soren Brinkmann76fcae32016-03-06 20:16:27 -080039
Soren Brinkmann85863992016-09-16 10:34:47 -070040 if (!ver) {
41 ver = mmio_read_32(ZYNQMP_CSU_BASEADDR +
42 ZYNQMP_CSU_VERSION_OFFSET);
43 ver &= ZYNQMP_SILICON_VER_MASK;
44 ver >>= ZYNQMP_SILICON_VER_SHIFT;
45 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -080046
47 return ver;
48}
49
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +053050uint32_t zynqmp_get_uart_clk(void)
Soren Brinkmann76fcae32016-03-06 20:16:27 -080051{
52 unsigned int ver = zynqmp_get_silicon_ver();
53
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053054 if (ver == ZYNQMP_CSU_VERSION_QEMU) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080055 return 133000000;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053056 } else {
Siva Durga Prasad Paladugudff07122018-09-04 18:02:25 +053057 return 100000000;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053058 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -080059}
60
Soren Brinkmann76fcae32016-03-06 20:16:27 -080061#if LOG_LEVEL >= LOG_LEVEL_NOTICE
62static const struct {
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +053063 uint32_t id;
64 uint32_t ver;
Soren Brinkmann76fcae32016-03-06 20:16:27 -080065 char *name;
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +053066 bool evexists;
Soren Brinkmann76fcae32016-03-06 20:16:27 -080067} zynqmp_devices[] = {
68 {
69 .id = 0x10,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060070 .name = "XCZU3EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -080071 },
72 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053073 .id = 0x10,
74 .ver = 0x2c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060075 .name = "XCZU3CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053076 },
77 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080078 .id = 0x11,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060079 .name = "XCZU2EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -080080 },
81 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053082 .id = 0x11,
83 .ver = 0x2c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060084 .name = "XCZU2CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053085 },
86 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080087 .id = 0x20,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060088 .name = "XCZU5EV",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +053089 .evexists = true,
Soren Brinkmann76fcae32016-03-06 20:16:27 -080090 },
91 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053092 .id = 0x20,
93 .ver = 0x100,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -060094 .name = "XCZU5EG",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +053095 .evexists = true,
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +053096 },
97 {
98 .id = 0x20,
99 .ver = 0x12c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600100 .name = "XCZU5CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530101 },
102 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800103 .id = 0x21,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600104 .name = "XCZU4EV",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530105 .evexists = true,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800106 },
107 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530108 .id = 0x21,
109 .ver = 0x100,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600110 .name = "XCZU4EG",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530111 .evexists = true,
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530112 },
113 {
114 .id = 0x21,
115 .ver = 0x12c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600116 .name = "XCZU4CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530117 },
118 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800119 .id = 0x30,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600120 .name = "XCZU7EV",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530121 .evexists = true,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800122 },
123 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530124 .id = 0x30,
125 .ver = 0x100,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600126 .name = "XCZU7EG",
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530127 .evexists = true,
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530128 },
129 {
130 .id = 0x30,
131 .ver = 0x12c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600132 .name = "XCZU7CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530133 },
134 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800135 .id = 0x38,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600136 .name = "XCZU9EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800137 },
138 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530139 .id = 0x38,
140 .ver = 0x2c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600141 .name = "XCZU9CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530142 },
143 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800144 .id = 0x39,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600145 .name = "XCZU6EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800146 },
147 {
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530148 .id = 0x39,
149 .ver = 0x2c,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600150 .name = "XCZU6CG",
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530151 },
152 {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800153 .id = 0x40,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600154 .name = "XCZU11EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800155 },
156 {
157 .id = 0x50,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600158 .name = "XCZU15EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800159 },
160 {
161 .id = 0x58,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600162 .name = "XCZU19EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800163 },
164 {
165 .id = 0x59,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600166 .name = "XCZU17EG",
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800167 },
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530168 {
169 .id = 0x60,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600170 .name = "XCZU28DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530171 },
172 {
173 .id = 0x61,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600174 .name = "XCZU21DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530175 },
176 {
177 .id = 0x62,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600178 .name = "XCZU29DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530179 },
180 {
181 .id = 0x63,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600182 .name = "XCZU23DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530183 },
184 {
185 .id = 0x64,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600186 .name = "XCZU27DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530187 },
188 {
189 .id = 0x65,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600190 .name = "XCZU25DR",
Siva Durga Prasad Paladugu19d69c02017-06-06 12:54:52 +0530191 },
Siva Durga Prasad Paladugu32267282019-03-23 15:26:31 +0530192 {
193 .id = 0x66,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600194 .name = "XCZU39DR",
Siva Durga Prasad Paladugu32267282019-03-23 15:26:31 +0530195 },
Venkatesh Yadav Abbarapu927c2b92019-07-30 11:12:55 +0530196 {
Venkatesh Yadav Abbarapu5a3226c2021-03-03 00:43:16 -0700197 .id = 0x7d,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600198 .name = "XCZU43DR",
Venkatesh Yadav Abbarapu5a3226c2021-03-03 00:43:16 -0700199 },
200 {
201 .id = 0x78,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600202 .name = "XCZU46DR",
Venkatesh Yadav Abbarapu5a3226c2021-03-03 00:43:16 -0700203 },
204 {
205 .id = 0x7f,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600206 .name = "XCZU47DR",
Venkatesh Yadav Abbarapu5a3226c2021-03-03 00:43:16 -0700207 },
208 {
Venkatesh Yadav Abbarapu927c2b92019-07-30 11:12:55 +0530209 .id = 0x7b,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600210 .name = "XCZU48DR",
Venkatesh Yadav Abbarapu927c2b92019-07-30 11:12:55 +0530211 },
212 {
213 .id = 0x7e,
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600214 .name = "XCZU49DR",
Venkatesh Yadav Abbarapu927c2b92019-07-30 11:12:55 +0530215 },
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800216};
217
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530218#define ZYNQMP_PL_STATUS_BIT 9
219#define ZYNQMP_PL_STATUS_MASK BIT(ZYNQMP_PL_STATUS_BIT)
220#define ZYNQMP_CSU_VERSION_MASK ~(ZYNQMP_PL_STATUS_MASK)
221
Michal Simekdfe452d2023-01-18 08:55:20 +0100222#define SILICON_ID_XCK24 0x4712093U
Venkatesh Yadav Abbarapua2ca35d2022-07-04 11:40:27 +0530223#define SILICON_ID_XCK26 0x4724093U
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600224
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530225static char *zynqmp_get_silicon_idcode_name(void)
Soren Brinkmanncb366812016-09-22 12:21:11 -0700226{
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530227 uint32_t id, ver, chipid[2];
228 size_t i, j, len;
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530229 const char *name = "EG/EV";
Soren Brinkmanncb366812016-09-22 12:21:11 -0700230
Siva Durga Prasad Paladugu6a8933c2018-06-20 17:03:57 +0530231#ifdef IMAGE_BL32
232 /*
233 * For BL32, get the chip id info directly by reading corresponding
234 * registers instead of making pm call. This has limitation
235 * that these registers should be configured to have access
236 * from APU which is default case.
237 */
238 chipid[0] = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_IDCODE_OFFSET);
239 chipid[1] = mmio_read_32(EFUSE_BASEADDR + EFUSE_IPDISABLE_OFFSET);
240#else
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530241 if (pm_get_chipid(chipid) != PM_RET_SUCCESS) {
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600242 return "XCZUUNKN";
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530243 }
Siva Durga Prasad Paladugu6a8933c2018-06-20 17:03:57 +0530244#endif
Soren Brinkmanncb366812016-09-22 12:21:11 -0700245
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530246 id = chipid[0] & (ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
247 ZYNQMP_CSU_IDCODE_SVD_MASK);
Soren Brinkmanncb366812016-09-22 12:21:11 -0700248 id >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530249 ver = chipid[1] >> ZYNQMP_EFUSE_IPDISABLE_SHIFT;
Soren Brinkmanncb366812016-09-22 12:21:11 -0700250
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530251 for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) {
252 if (zynqmp_devices[i].id == id &&
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530253 zynqmp_devices[i].ver == (ver & ZYNQMP_CSU_VERSION_MASK)) {
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530254 break;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530255 }
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530256 }
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530257
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600258 if (i >= ARRAY_SIZE(zynqmp_devices)) {
Venkatesh Yadav Abbarapue88671e2022-05-17 09:39:30 +0530259 switch (chipid[0]) {
260 case SILICON_ID_XCK24:
261 return "XCK24";
262 case SILICON_ID_XCK26:
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600263 return "XCK26";
Venkatesh Yadav Abbarapue88671e2022-05-17 09:39:30 +0530264 default:
Venkatesh Yadav Abbarapufcfdaf02021-04-21 21:54:48 -0600265 return "XCZUUNKN";
266 }
267 }
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530268
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530269 if (!zynqmp_devices[i].evexists) {
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530270 return zynqmp_devices[i].name;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530271 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800272
Venkatesh Yadav Abbarapu3a33f932022-05-04 14:27:56 +0530273 if ((ver & ZYNQMP_PL_STATUS_MASK) != 0U) {
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530274 return zynqmp_devices[i].name;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530275 }
Siva Durga Prasad Paladugu83e37252018-05-01 11:10:25 +0530276
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530277 len = strlen(zynqmp_devices[i].name) - 2;
278 for (j = 0; j < strlen(name); j++) {
279 zynqmp_devices[i].name[len] = name[j];
280 len++;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800281 }
Siva Durga Prasad Paladugub76656d2018-03-05 18:47:15 +0530282 zynqmp_devices[i].name[len] = '\0';
283
284 return zynqmp_devices[i].name;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800285}
286
287static unsigned int zynqmp_get_rtl_ver(void)
288{
289 uint32_t ver;
290
291 ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET);
292 ver &= ZYNQMP_RTL_VER_MASK;
293 ver >>= ZYNQMP_RTL_VER_SHIFT;
294
295 return ver;
296}
297
298static char *zynqmp_print_silicon_idcode(void)
299{
300 uint32_t id, maskid, tmp;
301
302 id = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_IDCODE_OFFSET);
303
304 tmp = id;
305 tmp &= ZYNQMP_CSU_IDCODE_XILINX_ID_MASK |
Soren Brinkmann31114132016-05-20 07:05:00 -0700306 ZYNQMP_CSU_IDCODE_FAMILY_MASK;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800307 maskid = ZYNQMP_CSU_IDCODE_XILINX_ID << ZYNQMP_CSU_IDCODE_XILINX_ID_SHIFT |
Soren Brinkmann31114132016-05-20 07:05:00 -0700308 ZYNQMP_CSU_IDCODE_FAMILY << ZYNQMP_CSU_IDCODE_FAMILY_SHIFT;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800309 if (tmp != maskid) {
Akshay Belsarebdffd362023-01-18 17:04:22 +0530310 ERROR("Incorrect IDCODE 0x%x, maskid 0x%x\n", id, maskid);
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800311 return "UNKN";
312 }
Akshay Belsarebdffd362023-01-18 17:04:22 +0530313 VERBOSE("IDCODE 0x%x\n", id);
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800314 return zynqmp_get_silicon_idcode_name();
315}
316
Michal Simekc98da1c2023-02-09 10:28:58 +0100317int32_t plat_is_smccc_feature_available(u_register_t fid)
318{
319 switch (fid) {
320 case SMCCC_ARCH_SOC_ID:
321 return SMC_ARCH_CALL_SUCCESS;
322 default:
323 return SMC_ARCH_CALL_NOT_SUPPORTED;
324 }
325
326 return SMC_ARCH_CALL_NOT_SUPPORTED;
327}
328
329int32_t plat_get_soc_version(void)
330{
331 uint32_t chip_id = zynqmp_get_silicon_ver();
332 uint32_t manfid = SOC_ID_SET_JEP_106(JEDEC_XILINX_BKID, JEDEC_XILINX_MFID);
333
334 return (int32_t)(manfid | (chip_id & 0xFFFF));
335}
336
337int32_t plat_get_soc_revision(void)
338{
339 return mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_IDCODE_OFFSET);
340}
341
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +0530342static uint32_t zynqmp_get_ps_ver(void)
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800343{
344 uint32_t ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET);
345
346 ver &= ZYNQMP_PS_VER_MASK;
347 ver >>= ZYNQMP_PS_VER_SHIFT;
348
Venkatesh Yadav Abbarapua2ca35d2022-07-04 11:40:27 +0530349 return ver + 1U;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800350}
351
352static void zynqmp_print_platform_name(void)
353{
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +0530354 uint32_t ver = zynqmp_get_silicon_ver();
355 uint32_t rtl = zynqmp_get_rtl_ver();
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800356 char *label = "Unknown";
357
358 switch (ver) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800359 case ZYNQMP_CSU_VERSION_QEMU:
360 label = "QEMU";
361 break;
362 case ZYNQMP_CSU_VERSION_SILICON:
363 label = "silicon";
364 break;
Jonathan Wrightff957ed2018-03-14 15:24:00 +0000365 default:
366 /* Do nothing in default case */
367 break;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800368 }
369
Venkatesh Yadav Abbarapu50dbb082022-04-12 09:21:32 +0530370 VERBOSE("TF-A running on %s/%s at 0x%x\n",
371 zynqmp_print_silicon_idcode(), label, BL31_BASE);
Venkatesh Yadav Abbarapud4740e42021-06-17 00:23:52 -0600372 VERBOSE("TF-A running on v%d/RTL%d.%d\n",
373 zynqmp_get_ps_ver(), (rtl & 0xf0) >> 4, rtl & 0xf);
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800374}
375#else
376static inline void zynqmp_print_platform_name(void) { }
377#endif
378
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +0530379uint32_t zynqmp_get_bootmode(void)
Soren Brinkmannb43d9432016-04-18 11:49:42 -0700380{
Siva Durga Prasad Paladugu00ae6c52017-02-20 17:55:50 +0530381 uint32_t r;
Siva Durga Prasad Paladugu40808bc2018-04-30 19:43:03 +0530382 unsigned int ret;
Siva Durga Prasad Paladugu00ae6c52017-02-20 17:55:50 +0530383
Siva Durga Prasad Paladugu40808bc2018-04-30 19:43:03 +0530384 ret = pm_mmio_read(CRL_APB_BOOT_MODE_USER, &r);
385
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530386 if (ret != PM_RET_SUCCESS) {
Siva Durga Prasad Paladugu00ae6c52017-02-20 17:55:50 +0530387 r = mmio_read_32(CRL_APB_BOOT_MODE_USER);
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530388 }
Soren Brinkmannb43d9432016-04-18 11:49:42 -0700389
390 return r & CRL_APB_BOOT_MODE_MASK;
391}
392
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800393void zynqmp_config_setup(void)
394{
Rajan Vaja12be18b2021-03-26 04:16:36 -0700395 uint64_t counter_freq;
396
Jolly Shah6a903472019-08-27 11:23:08 -0700397 /* Configure IPI data for ZynqMP */
398 zynqmp_ipi_config_table_init();
399
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800400 zynqmp_print_platform_name();
Rajan Vaja12be18b2021-03-26 04:16:36 -0700401
402 /* Configure counter frequency */
403 counter_freq = read_cntfrq_el0();
404 if (counter_freq == ZYNQMP_DEFAULT_COUNTER_FREQ) {
405 write_cntfrq_el0(plat_get_syscnt_freq2());
406 }
407
Soren Brinkmanne5bdcaa2016-06-22 09:02:56 -0700408 generic_delay_timer_init();
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800409}
410
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +0530411uint32_t plat_get_syscnt_freq2(void)
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800412{
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +0530413 uint32_t ver = zynqmp_get_silicon_ver();
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800414
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530415 if (ver == ZYNQMP_CSU_VERSION_QEMU) {
Edgar E. Iglesias481d2c22019-04-17 15:21:28 +0200416 return 65000000;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530417 } else {
Siva Durga Prasad Paladugudff07122018-09-04 18:02:25 +0530418 return mmio_read_32(IOU_SCNTRS_BASEFREQ);
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530419 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800420}