blob: a4c35e9a84ecead92fb459dcdeafdd940f06a721 [file] [log] [blame]
Varun Wadekar00759902017-05-31 11:41:00 -07001/*
2 * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <bl_common.h>
8#include <memctrl_v2.h>
9
10/*******************************************************************************
11 * Array to hold stream_id override config register offsets
12 ******************************************************************************/
13const static uint32_t tegra194_streamid_override_regs[] = {
14 MC_STREAMID_OVERRIDE_CFG_HDAR,
15 MC_STREAMID_OVERRIDE_CFG_HOST1XDMAR,
16 MC_STREAMID_OVERRIDE_CFG_NVENCSRD,
17 MC_STREAMID_OVERRIDE_CFG_SATAR,
18 MC_STREAMID_OVERRIDE_CFG_NVENCSWR,
19 MC_STREAMID_OVERRIDE_CFG_HDAW,
20 MC_STREAMID_OVERRIDE_CFG_SATAW,
21 MC_STREAMID_OVERRIDE_CFG_ISPRA,
22 MC_STREAMID_OVERRIDE_CFG_ISPFALR,
23 MC_STREAMID_OVERRIDE_CFG_ISPWA,
24 MC_STREAMID_OVERRIDE_CFG_ISPWB,
25 MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTR,
26 MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTW,
27 MC_STREAMID_OVERRIDE_CFG_XUSB_DEVR,
28 MC_STREAMID_OVERRIDE_CFG_XUSB_DEVW,
29 MC_STREAMID_OVERRIDE_CFG_TSECSRD,
30 MC_STREAMID_OVERRIDE_CFG_TSECSWR,
31 MC_STREAMID_OVERRIDE_CFG_SDMMCRA,
32 MC_STREAMID_OVERRIDE_CFG_SDMMCR,
33 MC_STREAMID_OVERRIDE_CFG_SDMMCRAB,
34 MC_STREAMID_OVERRIDE_CFG_SDMMCWA,
35 MC_STREAMID_OVERRIDE_CFG_SDMMCW,
36 MC_STREAMID_OVERRIDE_CFG_SDMMCWAB,
37 MC_STREAMID_OVERRIDE_CFG_VICSRD,
38 MC_STREAMID_OVERRIDE_CFG_VICSWR,
39 MC_STREAMID_OVERRIDE_CFG_VIW,
40 MC_STREAMID_OVERRIDE_CFG_NVDECSRD,
41 MC_STREAMID_OVERRIDE_CFG_NVDECSWR,
42 MC_STREAMID_OVERRIDE_CFG_APER,
43 MC_STREAMID_OVERRIDE_CFG_APEW,
44 MC_STREAMID_OVERRIDE_CFG_NVJPGSRD,
45 MC_STREAMID_OVERRIDE_CFG_NVJPGSWR,
46 MC_STREAMID_OVERRIDE_CFG_SESRD,
47 MC_STREAMID_OVERRIDE_CFG_SESWR,
48 MC_STREAMID_OVERRIDE_CFG_AXIAPR,
49 MC_STREAMID_OVERRIDE_CFG_AXIAPW,
50 MC_STREAMID_OVERRIDE_CFG_ETRR,
51 MC_STREAMID_OVERRIDE_CFG_ETRW,
52 MC_STREAMID_OVERRIDE_CFG_TSECSRDB,
53 MC_STREAMID_OVERRIDE_CFG_TSECSWRB,
54 MC_STREAMID_OVERRIDE_CFG_AXISR,
55 MC_STREAMID_OVERRIDE_CFG_AXISW,
56 MC_STREAMID_OVERRIDE_CFG_EQOSR,
57 MC_STREAMID_OVERRIDE_CFG_EQOSW,
58 MC_STREAMID_OVERRIDE_CFG_UFSHCR,
59 MC_STREAMID_OVERRIDE_CFG_UFSHCW,
60 MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR,
61 MC_STREAMID_OVERRIDE_CFG_BPMPR,
62 MC_STREAMID_OVERRIDE_CFG_BPMPW,
63 MC_STREAMID_OVERRIDE_CFG_BPMPDMAR,
64 MC_STREAMID_OVERRIDE_CFG_BPMPDMAW,
65 MC_STREAMID_OVERRIDE_CFG_AONR,
66 MC_STREAMID_OVERRIDE_CFG_AONW,
67 MC_STREAMID_OVERRIDE_CFG_AONDMAR,
68 MC_STREAMID_OVERRIDE_CFG_AONDMAW,
69 MC_STREAMID_OVERRIDE_CFG_SCER,
70 MC_STREAMID_OVERRIDE_CFG_SCEW,
71 MC_STREAMID_OVERRIDE_CFG_SCEDMAR,
72 MC_STREAMID_OVERRIDE_CFG_SCEDMAW,
73 MC_STREAMID_OVERRIDE_CFG_APEDMAR,
74 MC_STREAMID_OVERRIDE_CFG_APEDMAW,
75 MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR1,
76 MC_STREAMID_OVERRIDE_CFG_VICSRD1,
77 MC_STREAMID_OVERRIDE_CFG_NVDECSRD1,
78 MC_STREAMID_OVERRIDE_CFG_VIFALR,
79 MC_STREAMID_OVERRIDE_CFG_VIFALW,
80 MC_STREAMID_OVERRIDE_CFG_DLA0RDA,
81 MC_STREAMID_OVERRIDE_CFG_DLA0FALRDB,
82 MC_STREAMID_OVERRIDE_CFG_DLA0WRA,
83 MC_STREAMID_OVERRIDE_CFG_DLA0FALWRB,
84 MC_STREAMID_OVERRIDE_CFG_DLA1RDA,
85 MC_STREAMID_OVERRIDE_CFG_DLA1FALRDB,
86 MC_STREAMID_OVERRIDE_CFG_DLA1WRA,
87 MC_STREAMID_OVERRIDE_CFG_DLA1FALWRB,
88 MC_STREAMID_OVERRIDE_CFG_PVA0RDA,
89 MC_STREAMID_OVERRIDE_CFG_PVA0RDB,
90 MC_STREAMID_OVERRIDE_CFG_PVA0RDC,
91 MC_STREAMID_OVERRIDE_CFG_PVA0WRA,
92 MC_STREAMID_OVERRIDE_CFG_PVA0WRB,
93 MC_STREAMID_OVERRIDE_CFG_PVA0WRC,
94 MC_STREAMID_OVERRIDE_CFG_PVA1RDA,
95 MC_STREAMID_OVERRIDE_CFG_PVA1RDB,
96 MC_STREAMID_OVERRIDE_CFG_PVA1RDC,
97 MC_STREAMID_OVERRIDE_CFG_PVA1WRA,
98 MC_STREAMID_OVERRIDE_CFG_PVA1WRB,
99 MC_STREAMID_OVERRIDE_CFG_PVA1WRC,
100 MC_STREAMID_OVERRIDE_CFG_RCER,
101 MC_STREAMID_OVERRIDE_CFG_RCEW,
102 MC_STREAMID_OVERRIDE_CFG_RCEDMAR,
103 MC_STREAMID_OVERRIDE_CFG_RCEDMAW,
104 MC_STREAMID_OVERRIDE_CFG_NVENC1SRD,
105 MC_STREAMID_OVERRIDE_CFG_NVENC1SWR,
106 MC_STREAMID_OVERRIDE_CFG_PCIE0R,
107 MC_STREAMID_OVERRIDE_CFG_PCIE0W,
108 MC_STREAMID_OVERRIDE_CFG_PCIE1R,
109 MC_STREAMID_OVERRIDE_CFG_PCIE1W,
110 MC_STREAMID_OVERRIDE_CFG_PCIE2AR,
111 MC_STREAMID_OVERRIDE_CFG_PCIE2AW,
112 MC_STREAMID_OVERRIDE_CFG_PCIE3R,
113 MC_STREAMID_OVERRIDE_CFG_PCIE3W,
114 MC_STREAMID_OVERRIDE_CFG_PCIE4R,
115 MC_STREAMID_OVERRIDE_CFG_PCIE4W,
116 MC_STREAMID_OVERRIDE_CFG_PCIE5R,
117 MC_STREAMID_OVERRIDE_CFG_PCIE5W,
118 MC_STREAMID_OVERRIDE_CFG_ISPFALW,
119 MC_STREAMID_OVERRIDE_CFG_DLA0RDA1,
120 MC_STREAMID_OVERRIDE_CFG_DLA1RDA1,
121 MC_STREAMID_OVERRIDE_CFG_PVA0RDA1,
122 MC_STREAMID_OVERRIDE_CFG_PVA0RDB1,
123 MC_STREAMID_OVERRIDE_CFG_PVA1RDA1,
124 MC_STREAMID_OVERRIDE_CFG_PVA1RDB1,
125 MC_STREAMID_OVERRIDE_CFG_PCIE5R1,
126 MC_STREAMID_OVERRIDE_CFG_NVENCSRD1,
127 MC_STREAMID_OVERRIDE_CFG_NVENC1SRD1,
128 MC_STREAMID_OVERRIDE_CFG_ISPRA1,
129 MC_STREAMID_OVERRIDE_CFG_MIU0R,
130 MC_STREAMID_OVERRIDE_CFG_MIU0W,
131 MC_STREAMID_OVERRIDE_CFG_MIU1R,
132 MC_STREAMID_OVERRIDE_CFG_MIU1W,
133 MC_STREAMID_OVERRIDE_CFG_MIU2R,
134 MC_STREAMID_OVERRIDE_CFG_MIU2W,
135 MC_STREAMID_OVERRIDE_CFG_MIU3R,
136 MC_STREAMID_OVERRIDE_CFG_MIU3W
137};
138
139/*******************************************************************************
140 * Array to hold the security configs for stream IDs
141 ******************************************************************************/
142const static mc_streamid_security_cfg_t tegra194_streamid_sec_cfgs[] = {
143 mc_make_sec_cfg(HDAR, NON_SECURE, OVERRIDE, ENABLE),
144 mc_make_sec_cfg(HOST1XDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
145 mc_make_sec_cfg(NVENCSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
146 mc_make_sec_cfg(SATAR, NON_SECURE, OVERRIDE, ENABLE),
147 mc_make_sec_cfg(NVENCSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
148 mc_make_sec_cfg(HDAW, NON_SECURE, OVERRIDE, ENABLE),
149 mc_make_sec_cfg(SATAW, NON_SECURE, OVERRIDE, ENABLE),
150 mc_make_sec_cfg(ISPRA, NON_SECURE, NO_OVERRIDE, ENABLE),
151 mc_make_sec_cfg(ISPFALR, NON_SECURE, NO_OVERRIDE, ENABLE),
152 mc_make_sec_cfg(ISPWA, NON_SECURE, NO_OVERRIDE, ENABLE),
153 mc_make_sec_cfg(ISPWB, NON_SECURE, NO_OVERRIDE, ENABLE),
154 mc_make_sec_cfg(XUSB_HOSTR, NON_SECURE, OVERRIDE, ENABLE),
155 mc_make_sec_cfg(XUSB_HOSTW, NON_SECURE, OVERRIDE, ENABLE),
156 mc_make_sec_cfg(XUSB_DEVR, NON_SECURE, OVERRIDE, ENABLE),
157 mc_make_sec_cfg(XUSB_DEVW, NON_SECURE, OVERRIDE, ENABLE),
158 mc_make_sec_cfg(TSECSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
159 mc_make_sec_cfg(TSECSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
160 mc_make_sec_cfg(SDMMCRA, NON_SECURE, OVERRIDE, ENABLE),
161 mc_make_sec_cfg(SDMMCR, NON_SECURE, OVERRIDE, ENABLE),
162 mc_make_sec_cfg(SDMMCRAB, NON_SECURE, OVERRIDE, ENABLE),
163 mc_make_sec_cfg(SDMMCWA, NON_SECURE, OVERRIDE, ENABLE),
164 mc_make_sec_cfg(SDMMCW, NON_SECURE, OVERRIDE, ENABLE),
165 mc_make_sec_cfg(SDMMCWAB, NON_SECURE, OVERRIDE, ENABLE),
166 mc_make_sec_cfg(VICSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
167 mc_make_sec_cfg(VICSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
168 mc_make_sec_cfg(VIW, NON_SECURE, NO_OVERRIDE, ENABLE),
169 mc_make_sec_cfg(NVDECSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
170 mc_make_sec_cfg(NVDECSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
171 mc_make_sec_cfg(APER, NON_SECURE, NO_OVERRIDE, ENABLE),
172 mc_make_sec_cfg(APEW, NON_SECURE, NO_OVERRIDE, ENABLE),
173 mc_make_sec_cfg(NVJPGSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
174 mc_make_sec_cfg(NVJPGSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
175 mc_make_sec_cfg(SESRD, NON_SECURE, NO_OVERRIDE, ENABLE),
176 mc_make_sec_cfg(SESWR, NON_SECURE, NO_OVERRIDE, ENABLE),
177 mc_make_sec_cfg(AXIAPR, NON_SECURE, OVERRIDE, ENABLE),
178 mc_make_sec_cfg(AXIAPW, NON_SECURE, OVERRIDE, ENABLE),
179 mc_make_sec_cfg(ETRR, NON_SECURE, OVERRIDE, ENABLE),
180 mc_make_sec_cfg(ETRW, NON_SECURE, OVERRIDE, ENABLE),
181 mc_make_sec_cfg(TSECSRDB, NON_SECURE, NO_OVERRIDE, ENABLE),
182 mc_make_sec_cfg(TSECSWRB, NON_SECURE, NO_OVERRIDE, ENABLE),
183 mc_make_sec_cfg(AXISR, SECURE, NO_OVERRIDE, DISABLE),
184 mc_make_sec_cfg(AXISW, SECURE, NO_OVERRIDE, DISABLE),
185 mc_make_sec_cfg(EQOSR, NON_SECURE, OVERRIDE, ENABLE),
186 mc_make_sec_cfg(EQOSW, NON_SECURE, OVERRIDE, ENABLE),
187 mc_make_sec_cfg(UFSHCR, NON_SECURE, OVERRIDE, ENABLE),
188 mc_make_sec_cfg(UFSHCW, NON_SECURE, OVERRIDE, ENABLE),
189 mc_make_sec_cfg(NVDISPLAYR, NON_SECURE, OVERRIDE, ENABLE),
190 mc_make_sec_cfg(BPMPR, NON_SECURE, NO_OVERRIDE, ENABLE),
191 mc_make_sec_cfg(BPMPW, NON_SECURE, NO_OVERRIDE, ENABLE),
192 mc_make_sec_cfg(BPMPDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
193 mc_make_sec_cfg(BPMPDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
194 mc_make_sec_cfg(AONR, NON_SECURE, NO_OVERRIDE, ENABLE),
195 mc_make_sec_cfg(AONW, NON_SECURE, NO_OVERRIDE, ENABLE),
196 mc_make_sec_cfg(AONDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
197 mc_make_sec_cfg(AONDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
198 mc_make_sec_cfg(SCER, NON_SECURE, NO_OVERRIDE, ENABLE),
199 mc_make_sec_cfg(SCEW, NON_SECURE, NO_OVERRIDE, ENABLE),
200 mc_make_sec_cfg(SCEDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
201 mc_make_sec_cfg(SCEDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
202 mc_make_sec_cfg(APEDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
203 mc_make_sec_cfg(APEDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
204 mc_make_sec_cfg(NVDISPLAYR1, NON_SECURE, OVERRIDE, ENABLE),
205 mc_make_sec_cfg(VICSRD1, NON_SECURE, NO_OVERRIDE, ENABLE),
206 mc_make_sec_cfg(NVDECSRD1, NON_SECURE, NO_OVERRIDE, ENABLE),
207 mc_make_sec_cfg(VIFALR, NON_SECURE, NO_OVERRIDE, ENABLE),
208 mc_make_sec_cfg(VIFALW, NON_SECURE, NO_OVERRIDE, ENABLE),
209 mc_make_sec_cfg(DLA0RDA, NON_SECURE, NO_OVERRIDE, ENABLE),
210 mc_make_sec_cfg(DLA0FALRDB, NON_SECURE, NO_OVERRIDE, ENABLE),
211 mc_make_sec_cfg(DLA0WRA, NON_SECURE, NO_OVERRIDE, ENABLE),
212 mc_make_sec_cfg(DLA0FALWRB, NON_SECURE, NO_OVERRIDE, ENABLE),
213 mc_make_sec_cfg(DLA1RDA, NON_SECURE, NO_OVERRIDE, ENABLE),
214 mc_make_sec_cfg(DLA1FALRDB, NON_SECURE, NO_OVERRIDE, ENABLE),
215 mc_make_sec_cfg(DLA1WRA, NON_SECURE, NO_OVERRIDE, ENABLE),
216 mc_make_sec_cfg(DLA1FALWRB, NON_SECURE, NO_OVERRIDE, ENABLE),
217 mc_make_sec_cfg(PVA0RDA, NON_SECURE, NO_OVERRIDE, ENABLE),
218 mc_make_sec_cfg(PVA0RDB, NON_SECURE, NO_OVERRIDE, ENABLE),
219 mc_make_sec_cfg(PVA0RDC, NON_SECURE, NO_OVERRIDE, ENABLE),
220 mc_make_sec_cfg(PVA0WRA, NON_SECURE, NO_OVERRIDE, ENABLE),
221 mc_make_sec_cfg(PVA0WRB, NON_SECURE, NO_OVERRIDE, ENABLE),
222 mc_make_sec_cfg(PVA0WRC, NON_SECURE, NO_OVERRIDE, ENABLE),
223 mc_make_sec_cfg(PVA1RDA, NON_SECURE, NO_OVERRIDE, ENABLE),
224 mc_make_sec_cfg(PVA1RDB, NON_SECURE, NO_OVERRIDE, ENABLE),
225 mc_make_sec_cfg(PVA1RDC, NON_SECURE, NO_OVERRIDE, ENABLE),
226 mc_make_sec_cfg(PVA1WRA, NON_SECURE, NO_OVERRIDE, ENABLE),
227 mc_make_sec_cfg(PVA1WRB, NON_SECURE, NO_OVERRIDE, ENABLE),
228 mc_make_sec_cfg(PVA1WRC, NON_SECURE, NO_OVERRIDE, ENABLE),
229 mc_make_sec_cfg(RCER, NON_SECURE, NO_OVERRIDE, ENABLE),
230 mc_make_sec_cfg(RCEW, NON_SECURE, NO_OVERRIDE, ENABLE),
231 mc_make_sec_cfg(RCEDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
232 mc_make_sec_cfg(RCEDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
233 mc_make_sec_cfg(NVENC1SRD, NON_SECURE, NO_OVERRIDE, ENABLE),
234 mc_make_sec_cfg(NVENC1SWR, NON_SECURE, NO_OVERRIDE, ENABLE),
235 mc_make_sec_cfg(PCIE0R, NON_SECURE, OVERRIDE, ENABLE),
236 mc_make_sec_cfg(PCIE0W, NON_SECURE, OVERRIDE, ENABLE),
237 mc_make_sec_cfg(PCIE1R, NON_SECURE, OVERRIDE, ENABLE),
238 mc_make_sec_cfg(PCIE1W, NON_SECURE, OVERRIDE, ENABLE),
239 mc_make_sec_cfg(PCIE2AR, NON_SECURE, OVERRIDE, ENABLE),
240 mc_make_sec_cfg(PCIE2AW, NON_SECURE, OVERRIDE, ENABLE),
241 mc_make_sec_cfg(PCIE3R, NON_SECURE, OVERRIDE, ENABLE),
242 mc_make_sec_cfg(PCIE3W, NON_SECURE, OVERRIDE, ENABLE),
243 mc_make_sec_cfg(PCIE4R, NON_SECURE, OVERRIDE, ENABLE),
244 mc_make_sec_cfg(PCIE4W, NON_SECURE, OVERRIDE, ENABLE),
245 mc_make_sec_cfg(PCIE5R, NON_SECURE, OVERRIDE, ENABLE),
246 mc_make_sec_cfg(PCIE5W, NON_SECURE, OVERRIDE, ENABLE),
247 mc_make_sec_cfg(ISPFALW, NON_SECURE, NO_OVERRIDE, ENABLE),
248 mc_make_sec_cfg(DLA0RDA1, NON_SECURE, NO_OVERRIDE, ENABLE),
249 mc_make_sec_cfg(DLA1RDA1, NON_SECURE, NO_OVERRIDE, ENABLE),
250 mc_make_sec_cfg(PVA0RDA1, NON_SECURE, NO_OVERRIDE, ENABLE),
251 mc_make_sec_cfg(PVA0RDB1, NON_SECURE, NO_OVERRIDE, ENABLE),
252 mc_make_sec_cfg(PVA1RDA1, NON_SECURE, NO_OVERRIDE, ENABLE),
253 mc_make_sec_cfg(PVA1RDB1, NON_SECURE, NO_OVERRIDE, ENABLE),
254 mc_make_sec_cfg(PCIE5R1, NON_SECURE, OVERRIDE, ENABLE),
255 mc_make_sec_cfg(NVENCSRD1, NON_SECURE, NO_OVERRIDE, ENABLE),
256 mc_make_sec_cfg(NVENC1SRD1, NON_SECURE, NO_OVERRIDE, ENABLE),
257 mc_make_sec_cfg(ISPRA1, NON_SECURE, NO_OVERRIDE, ENABLE),
258 mc_make_sec_cfg(MIU0R, NON_SECURE, OVERRIDE, ENABLE),
259 mc_make_sec_cfg(MIU0W, NON_SECURE, OVERRIDE, ENABLE),
260 mc_make_sec_cfg(MIU1R, NON_SECURE, OVERRIDE, ENABLE),
261 mc_make_sec_cfg(MIU1W, NON_SECURE, OVERRIDE, ENABLE),
262 mc_make_sec_cfg(MIU2R, NON_SECURE, OVERRIDE, ENABLE),
263 mc_make_sec_cfg(MIU2W, NON_SECURE, OVERRIDE, ENABLE),
264 mc_make_sec_cfg(MIU3R, NON_SECURE, OVERRIDE, ENABLE),
265 mc_make_sec_cfg(MIU3W, NON_SECURE, OVERRIDE, ENABLE),
266};
267
268/*******************************************************************************
269 * Array to hold the transaction override configs
270 ******************************************************************************/
271const static mc_txn_override_cfg_t tegra194_txn_override_cfgs[] = {
272 mc_make_txn_override_cfg(NVENCSWR, CGID_TAG_ADR),
273 mc_make_txn_override_cfg(HDAW, CGID_TAG_ADR),
274 mc_make_txn_override_cfg(SATAW, CGID_TAG_ADR),
275 mc_make_txn_override_cfg(ISPWB, CGID_TAG_ADR),
276 mc_make_txn_override_cfg(XUSB_HOSTW, CGID_TAG_ADR),
277 mc_make_txn_override_cfg(XUSB_DEVW, CGID_TAG_ADR),
278 mc_make_txn_override_cfg(TSECSWR, CGID_TAG_ADR),
279 mc_make_txn_override_cfg(SDMMCWA, CGID_TAG_ADR),
280 mc_make_txn_override_cfg(SDMMCW, CGID_TAG_ADR),
281 mc_make_txn_override_cfg(SDMMCWAB, CGID_TAG_ADR),
282 mc_make_txn_override_cfg(VICSWR, CGID_TAG_ADR),
283 mc_make_txn_override_cfg(NVDECSWR, CGID_TAG_ADR),
284 mc_make_txn_override_cfg(APEW, CGID_TAG_ADR),
285 mc_make_txn_override_cfg(NVJPGSWR, CGID_TAG_ADR),
286 mc_make_txn_override_cfg(SESWR, CGID_TAG_ADR),
287 mc_make_txn_override_cfg(ETRW, CGID_TAG_ADR),
288 mc_make_txn_override_cfg(TSECSWRB, CGID_TAG_ADR),
289 mc_make_txn_override_cfg(AXISW, CGID_TAG_ADR),
290 mc_make_txn_override_cfg(EQOSW, CGID_TAG_ADR),
291 mc_make_txn_override_cfg(UFSHCW, CGID_TAG_ADR),
292 mc_make_txn_override_cfg(BPMPW, CGID_TAG_ADR),
293 mc_make_txn_override_cfg(BPMPDMAW, CGID_TAG_ADR),
294 mc_make_txn_override_cfg(AONW, CGID_TAG_ADR),
295 mc_make_txn_override_cfg(AONDMAW, CGID_TAG_ADR),
296 mc_make_txn_override_cfg(SCEW, CGID_TAG_ADR),
297 mc_make_txn_override_cfg(SCEDMAW, CGID_TAG_ADR),
298};
299
300/*******************************************************************************
301 * Struct to hold the memory controller settings
302 ******************************************************************************/
303static tegra_mc_settings_t tegra194_mc_settings = {
304 .streamid_override_cfg = tegra194_streamid_override_regs,
305 .num_streamid_override_cfgs = ARRAY_SIZE(tegra194_streamid_override_regs),
306 .streamid_security_cfg = tegra194_streamid_sec_cfgs,
307 .num_streamid_security_cfgs = ARRAY_SIZE(tegra194_streamid_sec_cfgs),
308 .txn_override_cfg = tegra194_txn_override_cfgs,
309 .num_txn_override_cfgs = ARRAY_SIZE(tegra194_txn_override_cfgs)
310};
311
312/*******************************************************************************
313 * Handler to return the pointer to the memory controller's settings struct
314 ******************************************************************************/
315tegra_mc_settings_t *tegra_get_mc_settings(void)
316{
317 return &tegra194_mc_settings;
318}