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git01.mediatek.com / filogic / atf / 2d9a42df2f6fa12c82ea57d4f3373e1181a3c35d / . / plat / hisilicon / hikey960 / hikey960_bl2_mem_params_desc.c
blob: 7141e989082fc1a9c82cc5b85425e141b1c8376c [file] [log] [blame]
Victor Chong2d9a42d2017-08-17 15:21:10 +0900[diff] [blame^]1/*
2 * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <bl_common.h>
8#include <desc_image_load.h>
9#include <platform.h>
10#include <platform_def.h>
11
12
13/*******************************************************************************
14 * Following descriptor provides BL image/ep information that gets used
15 * by BL2 to load the images and also subset of this information is
16 * passed to next BL image. The image loading sequence is managed by
17 * populating the images in required loading order. The image execution
18 * sequence is managed by populating the `next_handoff_image_id` with
19 * the next executable image id.
20 ******************************************************************************/
21static bl_mem_params_node_t bl2_mem_params_descs[] = {
22#ifdef SCP_BL2_BASE
23 /* Fill SCP_BL2 related information if it exists */
24 {
25 .image_id = SCP_BL2_IMAGE_ID,
26
27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
28 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
29
30 SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
31 VERSION_2, image_info_t, 0),
32 .image_info.image_base = SCP_BL2_BASE,
33 .image_info.image_max_size = SCP_BL2_SIZE,
34
35 .next_handoff_image_id = INVALID_IMAGE_ID,
36 },
37#endif /* SCP_BL2_BASE */
38
39#ifdef EL3_PAYLOAD_BASE
40 /* Fill EL3 payload related information (BL31 is EL3 payload)*/
41 {
42 .image_id = BL31_IMAGE_ID,
43
44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
45 VERSION_2, entry_point_info_t,
46 SECURE | EXECUTABLE | EP_FIRST_EXE),
47 .ep_info.pc = EL3_PAYLOAD_BASE,
48 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
49 DISABLE_ALL_EXCEPTIONS),
50
51 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
52 VERSION_2, image_info_t,
53 IMAGE_ATTRIB_PLAT_SETUP | IMAGE_ATTRIB_SKIP_LOADING),
54
55 .next_handoff_image_id = INVALID_IMAGE_ID,
56 },
57
58#else /* EL3_PAYLOAD_BASE */
59
60 /* Fill BL31 related information */
61 {
62 .image_id = BL31_IMAGE_ID,
63
64 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
65 VERSION_2, entry_point_info_t,
66 SECURE | EXECUTABLE | EP_FIRST_EXE),
67 .ep_info.pc = BL31_BASE,
68 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
69 DISABLE_ALL_EXCEPTIONS),
70#if DEBUG
71 .ep_info.args.arg1 = HIKEY960_BL31_PLAT_PARAM_VAL,
72#endif
73
74 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
75 VERSION_2, image_info_t, IMAGE_ATTRIB_PLAT_SETUP),
76 .image_info.image_base = BL31_BASE,
77 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
78
79# ifdef BL32_BASE
80 .next_handoff_image_id = BL32_IMAGE_ID,
81# else
82 .next_handoff_image_id = BL33_IMAGE_ID,
83# endif
84 },
85
86# ifdef BL32_BASE
87 /* Fill BL32 related information */
88 {
89 .image_id = BL32_IMAGE_ID,
90
91 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
92 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),
93 .ep_info.pc = BL32_BASE,
94
95 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
96 VERSION_2, image_info_t, 0),
97 .image_info.image_base = BL32_BASE,
98 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
99
100 .next_handoff_image_id = BL33_IMAGE_ID,
101 },
102# endif /* BL32_BASE */
103
104 /* Fill BL33 related information */
105 {
106 .image_id = BL33_IMAGE_ID,
107 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
108 VERSION_2, entry_point_info_t, NON_SECURE | EXECUTABLE),
109# ifdef PRELOADED_BL33_BASE
110 .ep_info.pc = PRELOADED_BL33_BASE,
111
112 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
113 VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
114# else
115 .ep_info.pc = NS_BL1U_BASE,
116
117 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
118 VERSION_2, image_info_t, 0),
119 .image_info.image_base = NS_BL1U_BASE,
120 .image_info.image_max_size = 0x200000 /* 2MB */,
121# endif /* PRELOADED_BL33_BASE */
122
123 .next_handoff_image_id = INVALID_IMAGE_ID,
124 }
125#endif /* EL3_PAYLOAD_BASE */
126};
127
128REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs)