Chandni Cherukuri | a3f6613 | 2018-08-10 11:17:58 +0530 | [diff] [blame] | 1 | /* |
Deepika Bhavnani | 4287c0c | 2019-12-13 10:23:18 -0600 | [diff] [blame] | 2 | * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. |
Chandni Cherukuri | a3f6613 | 2018-08-10 11:17:58 +0530 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef PLATFORM_DEF_H |
| 8 | #define PLATFORM_DEF_H |
| 9 | |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 10 | #include <lib/utils_def.h> |
| 11 | |
Chandni Cherukuri | a3f6613 | 2018-08-10 11:17:58 +0530 | [diff] [blame] | 12 | #include <sgi_base_platform_def.h> |
| 13 | |
Deepika Bhavnani | 4287c0c | 2019-12-13 10:23:18 -0600 | [diff] [blame] | 14 | #define PLAT_ARM_CLUSTER_COUNT U(2) |
| 15 | #define CSS_SGI_MAX_CPUS_PER_CLUSTER U(4) |
| 16 | #define CSS_SGI_MAX_PE_PER_CPU U(1) |
Chandni Cherukuri | a3f6613 | 2018-08-10 11:17:58 +0530 | [diff] [blame] | 17 | |
Vijayenthiran Subramaniam | 22141b6 | 2018-10-25 22:20:24 +0530 | [diff] [blame] | 18 | #define PLAT_CSS_MHU_BASE UL(0x45000000) |
Masahisa Kojima | 0d31688 | 2019-03-07 11:23:42 +0900 | [diff] [blame] | 19 | #define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE |
Vijayenthiran Subramaniam | 22141b6 | 2018-10-25 22:20:24 +0530 | [diff] [blame] | 20 | |
| 21 | /* Base address of DMC-620 instances */ |
| 22 | #define SGI575_DMC620_BASE0 UL(0x4e000000) |
| 23 | #define SGI575_DMC620_BASE1 UL(0x4e100000) |
Chandni Cherukuri | a3f6613 | 2018-08-10 11:17:58 +0530 | [diff] [blame] | 24 | |
Chandni Cherukuri | 0fdcbc0 | 2018-10-16 15:19:54 +0530 | [diff] [blame] | 25 | /* System power domain level */ |
| 26 | #define CSS_SYSTEM_PWR_DMN_LVL ARM_PWR_LVL2 |
| 27 | |
Chandni Cherukuri | 504c05d | 2018-10-16 14:11:34 +0530 | [diff] [blame] | 28 | #define PLAT_MAX_PWR_LVL ARM_PWR_LVL1 |
| 29 | |
Manoj Kumar | 69bebd8 | 2019-06-21 17:07:13 +0100 | [diff] [blame] | 30 | /* |
| 31 | * Physical and virtual address space limits for MMU in AARCH64 & AARCH32 modes |
| 32 | */ |
Julius Werner | 8e0ef0f | 2019-07-09 14:02:43 -0700 | [diff] [blame] | 33 | #ifdef __aarch64__ |
Manoj Kumar | 69bebd8 | 2019-06-21 17:07:13 +0100 | [diff] [blame] | 34 | #define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 36) |
| 35 | #define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 36) |
| 36 | #else |
| 37 | #define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32) |
| 38 | #define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32) |
| 39 | #endif |
| 40 | |
Chandni Cherukuri | a3f6613 | 2018-08-10 11:17:58 +0530 | [diff] [blame] | 41 | #endif /* PLATFORM_DEF_H */ |