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Radoslaw Biernacki1201aba2018-05-17 22:52:49 +02001#
Chris Kaye9272152021-09-28 15:52:14 +01002# Copyright (c) 2019-2021, Linaro Limited and Contributors. All rights reserved.
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +02003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Chris Kaye9272152021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +02009CRASH_REPORTING := 1
10
11include lib/libfdt/libfdt.mk
12
Masahisa Kojima099064b2020-06-11 21:46:44 +090013ifeq (${SPM_MM},1)
14NEED_BL32 := yes
15EL3_EXCEPTION_HANDLING := 1
16GICV2_G0_FOR_EL3 := 1
17endif
18
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +020019# Enable new version of image loading on QEMU platforms
20LOAD_IMAGE_V2 := 1
21
Chen Baozi58e256d2023-02-22 06:58:39 +000022CTX_INCLUDE_AARCH32_REGS := 0
23ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
24$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
25endif
26
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +020027ifeq ($(NEED_BL32),yes)
28$(eval $(call add_define,QEMU_LOAD_BL32))
29endif
30
31PLAT_QEMU_PATH := plat/qemu/qemu_sbsa
32PLAT_QEMU_COMMON_PATH := plat/qemu/common
33PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
34 -I${PLAT_QEMU_COMMON_PATH}/include \
35 -I${PLAT_QEMU_PATH}/include \
36 -Iinclude/common/tbbr
37
38PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
39
40PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \
41 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \
42 drivers/arm/pl011/${ARCH}/pl011_console.S
43
Chen Baozi58e256d2023-02-22 06:58:39 +000044# Treating this as a memory-constrained port for now
45USE_COHERENT_MEM := 0
46
47# This can be overridden depending on CPU(s) used in the QEMU image
48HW_ASSISTED_COHERENCY := 1
49
50QEMU_CPU_LIBS := lib/cpus/aarch64/cortex_a57.S \
51 lib/cpus/aarch64/cortex_a72.S \
52 lib/cpus/aarch64/neoverse_n_common.S \
53 lib/cpus/aarch64/neoverse_n1.S \
54 lib/cpus/aarch64/qemu_max.S
55
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +020056include lib/xlat_tables_v2/xlat_tables.mk
57PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
58
59BL1_SOURCES += drivers/io/io_semihosting.c \
60 drivers/io/io_storage.c \
61 drivers/io/io_fip.c \
62 drivers/io/io_memmap.c \
63 lib/semihosting/semihosting.c \
64 lib/semihosting/${ARCH}/semihosting_call.S \
65 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
66 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
67 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c
68
Chen Baozi58e256d2023-02-22 06:58:39 +000069BL1_SOURCES += ${QEMU_CPU_LIBS}
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +020070
71BL2_SOURCES += drivers/io/io_semihosting.c \
72 drivers/io/io_storage.c \
73 drivers/io/io_fip.c \
74 drivers/io/io_memmap.c \
75 lib/semihosting/semihosting.c \
76 lib/semihosting/${ARCH}/semihosting_call.S \
77 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
78 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
79 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \
80 common/fdt_fixup.c \
81 $(LIBFDT_SRCS)
82ifeq (${LOAD_IMAGE_V2},1)
83BL2_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \
84 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \
85 common/desc_image_load.c
86endif
87
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000088# Include GICv3 driver files
89include drivers/arm/gic/v3/gicv3.mk
90
91QEMU_GIC_SOURCES := ${GICV3_SOURCES} \
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +020092 plat/common/plat_gicv3.c \
93 ${PLAT_QEMU_COMMON_PATH}/qemu_gicv3.c
94
Chen Baozi58e256d2023-02-22 06:58:39 +000095BL31_SOURCES += ${QEMU_CPU_LIBS} \
Andrew Walbranf3a68392020-01-15 14:18:04 +000096 lib/semihosting/semihosting.c \
97 lib/semihosting/${ARCH}/semihosting_call.S \
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +020098 plat/common/plat_psci_common.c \
Graeme Gregory1a732232020-08-28 18:03:35 +010099 ${PLAT_QEMU_PATH}/sbsa_pm.c \
Graeme Gregory10e92232020-08-28 16:37:02 +0100100 ${PLAT_QEMU_PATH}/sbsa_topology.c \
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +0200101 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \
102 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
Masahisa Kojima7e917dc2020-09-23 16:52:59 +0900103 common/fdt_fixup.c \
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +0200104 ${QEMU_GIC_SOURCES}
Chris Kaye9272152021-09-28 15:52:14 +0100105
106BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
107
Masahisa Kojima099064b2020-06-11 21:46:44 +0900108ifeq (${SPM_MM},1)
109 BL31_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_spm.c
110endif
Radoslaw Biernacki1201aba2018-05-17 22:52:49 +0200111
112SEPARATE_CODE_AND_RODATA := 1
113ENABLE_STACK_PROTECTOR := 0
114ifneq ($(ENABLE_STACK_PROTECTOR), 0)
115 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
116endif
117
118MULTI_CONSOLE_API := 1
119
120# Disable the PSCI platform compatibility layer
121ENABLE_PLAT_COMPAT := 0
122
123# Use known base for UEFI if not given from command line
124# By default BL33 is at FLASH1 base
125PRELOADED_BL33_BASE ?= 0x10000000
126
127# Qemu SBSA plafrom only support SEC_SRAM
128BL32_RAM_LOCATION_ID = SEC_SRAM_ID
129$(eval $(call add_define,BL32_RAM_LOCATION_ID))
130
Andrew Walbran9c4d0692020-01-15 14:11:31 +0000131# Don't have the Linux kernel as a BL33 image by default
132ARM_LINUX_KERNEL_AS_BL33 := 0
133$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
134$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
135
136ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
137$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
138
Marcin Juszkiewicz6c8b65a2022-11-16 14:47:51 +0100139# Later QEMU versions support SME and SVE.
140ENABLE_SVE_FOR_NS := 1
141ENABLE_SME_FOR_NS := 1