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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
34#include <bl_common.h>
35#include <context.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000036#include <context_mgmt.h>
Dan Handley714a0d22014-04-09 13:13:04 +010037#include <debug.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010038#include <platform.h>
Andrew Thoelke4e126072014-06-04 21:10:52 +010039#include <string.h>
Dan Handley714a0d22014-04-09 13:13:04 +010040#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010041
Achin Gupta607084e2014-02-09 18:24:19 +000042/*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000043 * SPD power management operations, expected to be supplied by the registered
44 * SPD on successful SP initialization
Achin Gupta607084e2014-02-09 18:24:19 +000045 */
Dan Handleye2712bc2014-04-10 15:37:22 +010046const spd_pm_ops_t *psci_spd_pm;
Achin Gupta607084e2014-02-09 18:24:19 +000047
Achin Gupta4f6ad662013-10-25 09:08:21 +010048/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010049 * Grand array that holds the platform's topology information for state
50 * management of affinity instances. Each node (aff_map_node) in the array
51 * corresponds to an affinity instance e.g. cluster, cpu within an mpidr
52 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +010053aff_map_node_t psci_aff_map[PSCI_NUM_AFFS]
Achin Gupta4f6ad662013-10-25 09:08:21 +010054__attribute__ ((section("tzfw_coherent_mem")));
55
56/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010057 * Pointer to functions exported by the platform to complete power mgmt. ops
58 ******************************************************************************/
Dan Handleya4cb68e2014-04-23 13:47:06 +010059const plat_pm_ops_t *psci_plat_pm_ops;
Achin Gupta4f6ad662013-10-25 09:08:21 +010060
61/*******************************************************************************
Achin Guptaf6b9e992014-07-31 11:19:11 +010062 * This function is passed an array of pointers to affinity level nodes in the
63 * topology tree for an mpidr. It iterates through the nodes to find the highest
64 * affinity level which is marked as physically powered off.
65 ******************************************************************************/
66uint32_t psci_find_max_phys_off_afflvl(uint32_t start_afflvl,
67 uint32_t end_afflvl,
Achin Gupta56bcdc22014-07-28 00:15:23 +010068 aff_map_node_t *mpidr_nodes[])
Achin Guptaf6b9e992014-07-31 11:19:11 +010069{
70 uint32_t max_afflvl = PSCI_INVALID_DATA;
71
72 for (; start_afflvl <= end_afflvl; start_afflvl++) {
73 if (mpidr_nodes[start_afflvl] == NULL)
74 continue;
75
76 if (psci_get_phys_state(mpidr_nodes[start_afflvl]) ==
77 PSCI_STATE_OFF)
78 max_afflvl = start_afflvl;
79 }
80
81 return max_afflvl;
82}
83
84/*******************************************************************************
85 * This function saves the highest affinity level which is in OFF state. The
86 * affinity instance with which the level is associated is determined by the
87 * caller.
88 ******************************************************************************/
89void psci_set_max_phys_off_afflvl(uint32_t afflvl)
90{
91 set_cpu_data(psci_svc_cpu_data.max_phys_off_afflvl, afflvl);
92
93 /*
94 * Ensure that the saved value is flushed to main memory and any
95 * speculatively pre-fetched stale copies are invalidated from the
96 * caches of other cpus in the same coherency domain. This ensures that
97 * the value can be safely read irrespective of the state of the data
98 * cache.
99 */
100 flush_cpu_data(psci_svc_cpu_data.max_phys_off_afflvl);
101}
102
103/*******************************************************************************
104 * This function reads the saved highest affinity level which is in OFF
105 * state. The affinity instance with which the level is associated is determined
106 * by the caller.
107 ******************************************************************************/
108uint32_t psci_get_max_phys_off_afflvl(void)
109{
110 /*
111 * Ensure that the last update of this value in this cpu's cache is
112 * flushed to main memory and any speculatively pre-fetched stale copies
113 * are invalidated from the caches of other cpus in the same coherency
114 * domain. This ensures that the value is always read from the main
115 * memory when it was written before the data cache was enabled.
116 */
117 flush_cpu_data(psci_svc_cpu_data.max_phys_off_afflvl);
118 return get_cpu_data(psci_svc_cpu_data.max_phys_off_afflvl);
119}
120
121/*******************************************************************************
Achin Guptaa45e3972013-12-05 15:10:48 +0000122 * Routine to return the maximum affinity level to traverse to after a cpu has
123 * been physically powered up. It is expected to be called immediately after
Achin Guptaf3ccbab2014-07-25 14:52:47 +0100124 * reset from assembler code.
Achin Guptaa45e3972013-12-05 15:10:48 +0000125 ******************************************************************************/
Achin Guptaf3ccbab2014-07-25 14:52:47 +0100126int get_power_on_target_afflvl()
Achin Guptaa45e3972013-12-05 15:10:48 +0000127{
Vikram Kanigirif100f412014-04-01 19:26:26 +0100128 int afflvl;
Achin Guptaa45e3972013-12-05 15:10:48 +0000129
Achin Guptaf3ccbab2014-07-25 14:52:47 +0100130#if DEBUG
131 unsigned int state;
132 aff_map_node_t *node;
133
Achin Guptaa45e3972013-12-05 15:10:48 +0000134 /* Retrieve our node from the topology tree */
Achin Guptaf3ccbab2014-07-25 14:52:47 +0100135 node = psci_get_aff_map_node(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
136 MPIDR_AFFLVL0);
Achin Guptaa45e3972013-12-05 15:10:48 +0000137 assert(node);
138
139 /*
Achin Guptaf3ccbab2014-07-25 14:52:47 +0100140 * Sanity check the state of the cpu. It should be either suspend or "on
141 * pending"
Achin Guptaa45e3972013-12-05 15:10:48 +0000142 */
Achin Gupta75f73672013-12-05 16:33:10 +0000143 state = psci_get_state(node);
Achin Guptaf3ccbab2014-07-25 14:52:47 +0100144 assert(state == PSCI_STATE_SUSPEND || state == PSCI_STATE_ON_PENDING);
145#endif
Achin Guptaa45e3972013-12-05 15:10:48 +0000146
Achin Guptaf3ccbab2014-07-25 14:52:47 +0100147 /*
148 * Assume that this cpu was suspended and retrieve its target affinity
149 * level. If it is invalid then it could only have been turned off
150 * earlier. get_max_afflvl() will return the highest affinity level a
151 * cpu can be turned off to.
152 */
153 afflvl = psci_get_suspend_afflvl();
154 if (afflvl == PSCI_INVALID_DATA)
155 afflvl = get_max_afflvl();
156 return afflvl;
Achin Guptaa45e3972013-12-05 15:10:48 +0000157}
158
159/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100160 * Simple routine to retrieve the maximum affinity level supported by the
161 * platform and check that it makes sense.
162 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +0100163int get_max_afflvl(void)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100164{
165 int aff_lvl;
166
167 aff_lvl = plat_get_max_afflvl();
168 assert(aff_lvl <= MPIDR_MAX_AFFLVL && aff_lvl >= MPIDR_AFFLVL0);
169
170 return aff_lvl;
171}
172
173/*******************************************************************************
174 * Simple routine to set the id of an affinity instance at a given level in the
175 * mpidr.
176 ******************************************************************************/
177unsigned long mpidr_set_aff_inst(unsigned long mpidr,
178 unsigned char aff_inst,
179 int aff_lvl)
180{
181 unsigned long aff_shift;
182
183 assert(aff_lvl <= MPIDR_AFFLVL3);
184
185 /*
186 * Decide the number of bits to shift by depending upon
187 * the affinity level
188 */
189 aff_shift = get_afflvl_shift(aff_lvl);
190
191 /* Clear the existing affinity instance & set the new one*/
192 mpidr &= ~(MPIDR_AFFLVL_MASK << aff_shift);
193 mpidr |= aff_inst << aff_shift;
194
195 return mpidr;
196}
197
198/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000199 * This function sanity checks a range of affinity levels.
200 ******************************************************************************/
201int psci_check_afflvl_range(int start_afflvl, int end_afflvl)
202{
203 /* Sanity check the parameters passed */
Soby Mathew2b697502014-10-02 17:24:19 +0100204 if (end_afflvl > get_max_afflvl())
Achin Gupta0959db52013-12-02 17:33:04 +0000205 return PSCI_E_INVALID_PARAMS;
206
207 if (start_afflvl < MPIDR_AFFLVL0)
208 return PSCI_E_INVALID_PARAMS;
209
210 if (end_afflvl < start_afflvl)
211 return PSCI_E_INVALID_PARAMS;
212
213 return PSCI_E_SUCCESS;
214}
215
216/*******************************************************************************
217 * This function is passed an array of pointers to affinity level nodes in the
Achin Guptacab78e42014-07-28 00:09:01 +0100218 * topology tree for an mpidr and the state which each node should transition
219 * to. It updates the state of each node between the specified affinity levels.
220 ******************************************************************************/
221void psci_do_afflvl_state_mgmt(uint32_t start_afflvl,
222 uint32_t end_afflvl,
Achin Gupta56bcdc22014-07-28 00:15:23 +0100223 aff_map_node_t *mpidr_nodes[],
Achin Guptacab78e42014-07-28 00:09:01 +0100224 uint32_t state)
225{
226 uint32_t level;
227
228 for (level = start_afflvl; level <= end_afflvl; level++) {
229 if (mpidr_nodes[level] == NULL)
230 continue;
231 psci_set_state(mpidr_nodes[level], state);
232 }
233}
234
235/*******************************************************************************
236 * This function is passed an array of pointers to affinity level nodes in the
Achin Gupta0959db52013-12-02 17:33:04 +0000237 * topology tree for an mpidr. It picks up locks for each affinity level bottom
238 * up in the range specified.
239 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100240void psci_acquire_afflvl_locks(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000241 int end_afflvl,
Achin Gupta56bcdc22014-07-28 00:15:23 +0100242 aff_map_node_t *mpidr_nodes[])
Achin Gupta0959db52013-12-02 17:33:04 +0000243{
244 int level;
245
246 for (level = start_afflvl; level <= end_afflvl; level++) {
247 if (mpidr_nodes[level] == NULL)
248 continue;
Andrew Thoelke958cc022014-06-09 12:54:15 +0100249 bakery_lock_get(&mpidr_nodes[level]->lock);
Achin Gupta0959db52013-12-02 17:33:04 +0000250 }
251}
252
253/*******************************************************************************
254 * This function is passed an array of pointers to affinity level nodes in the
255 * topology tree for an mpidr. It releases the lock for each affinity level top
256 * down in the range specified.
257 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100258void psci_release_afflvl_locks(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000259 int end_afflvl,
Achin Gupta56bcdc22014-07-28 00:15:23 +0100260 aff_map_node_t *mpidr_nodes[])
Achin Gupta0959db52013-12-02 17:33:04 +0000261{
262 int level;
263
264 for (level = end_afflvl; level >= start_afflvl; level--) {
265 if (mpidr_nodes[level] == NULL)
266 continue;
Andrew Thoelke958cc022014-06-09 12:54:15 +0100267 bakery_lock_release(&mpidr_nodes[level]->lock);
Achin Gupta0959db52013-12-02 17:33:04 +0000268 }
269}
270
271/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100272 * Simple routine to determine whether an affinity instance at a given level
273 * in an mpidr exists or not.
274 ******************************************************************************/
275int psci_validate_mpidr(unsigned long mpidr, int level)
276{
Dan Handleye2712bc2014-04-10 15:37:22 +0100277 aff_map_node_t *node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100278
279 node = psci_get_aff_map_node(mpidr, level);
280 if (node && (node->state & PSCI_AFF_PRESENT))
281 return PSCI_E_SUCCESS;
282 else
283 return PSCI_E_INVALID_PARAMS;
284}
285
286/*******************************************************************************
Andrew Thoelke4e126072014-06-04 21:10:52 +0100287 * This function determines the full entrypoint information for the requested
288 * PSCI entrypoint on power on/resume and saves this in the non-secure CPU
289 * cpu_context, ready for when the core boots.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100290 ******************************************************************************/
Andrew Thoelke4e126072014-06-04 21:10:52 +0100291int psci_save_ns_entry(uint64_t mpidr,
292 uint64_t entrypoint, uint64_t context_id,
293 uint32_t ns_scr_el3, uint32_t ns_sctlr_el1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100294{
Andrew Thoelke4e126072014-06-04 21:10:52 +0100295 uint32_t ep_attr, mode, sctlr, daif, ee;
296 entry_point_info_t ep;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100297
Andrew Thoelke4e126072014-06-04 21:10:52 +0100298 sctlr = ns_scr_el3 & SCR_HCE_BIT ? read_sctlr_el2() : ns_sctlr_el1;
299 ee = 0;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100300
Andrew Thoelke4e126072014-06-04 21:10:52 +0100301 ep_attr = NON_SECURE | EP_ST_DISABLE;
302 if (sctlr & SCTLR_EE_BIT) {
303 ep_attr |= EP_EE_BIG;
304 ee = 1;
305 }
306 SET_PARAM_HEAD(&ep, PARAM_EP, VERSION_1, ep_attr);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100307
Andrew Thoelke4e126072014-06-04 21:10:52 +0100308 ep.pc = entrypoint;
309 memset(&ep.args, 0, sizeof(ep.args));
310 ep.args.arg0 = context_id;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100311
312 /*
313 * Figure out whether the cpu enters the non-secure address space
314 * in aarch32 or aarch64
315 */
Andrew Thoelke4e126072014-06-04 21:10:52 +0100316 if (ns_scr_el3 & SCR_RW_BIT) {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100317
318 /*
319 * Check whether a Thumb entry point has been provided for an
320 * aarch64 EL
321 */
322 if (entrypoint & 0x1)
323 return PSCI_E_INVALID_PARAMS;
324
Andrew Thoelke4e126072014-06-04 21:10:52 +0100325 mode = ns_scr_el3 & SCR_HCE_BIT ? MODE_EL2 : MODE_EL1;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100326
Andrew Thoelke4e126072014-06-04 21:10:52 +0100327 ep.spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100328 } else {
329
Andrew Thoelke4e126072014-06-04 21:10:52 +0100330 mode = ns_scr_el3 & SCR_HCE_BIT ? MODE32_hyp : MODE32_svc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100331
332 /*
333 * TODO: Choose async. exception bits if HYP mode is not
334 * implemented according to the values of SCR.{AW, FW} bits
335 */
Vikram Kanigiri9851e422014-05-13 14:42:08 +0100336 daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT;
337
Andrew Thoelke4e126072014-06-04 21:10:52 +0100338 ep.spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, daif);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100339 }
340
Andrew Thoelke4e126072014-06-04 21:10:52 +0100341 /* initialise an entrypoint to set up the CPU context */
342 cm_init_context(mpidr, &ep);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100343
Andrew Thoelke4e126072014-06-04 21:10:52 +0100344 return PSCI_E_SUCCESS;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100345}
346
347/*******************************************************************************
Achin Gupta75f73672013-12-05 16:33:10 +0000348 * This function takes a pointer to an affinity node in the topology tree and
349 * returns its state. State of a non-leaf node needs to be calculated.
350 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100351unsigned short psci_get_state(aff_map_node_t *node)
Achin Gupta75f73672013-12-05 16:33:10 +0000352{
353 assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL);
354
355 /* A cpu node just contains the state which can be directly returned */
356 if (node->level == MPIDR_AFFLVL0)
357 return (node->state >> PSCI_STATE_SHIFT) & PSCI_STATE_MASK;
358
359 /*
360 * For an affinity level higher than a cpu, the state has to be
361 * calculated. It depends upon the value of the reference count
362 * which is managed by each node at the next lower affinity level
363 * e.g. for a cluster, each cpu increments/decrements the reference
364 * count. If the reference count is 0 then the affinity level is
365 * OFF else ON.
366 */
367 if (node->ref_count)
368 return PSCI_STATE_ON;
369 else
370 return PSCI_STATE_OFF;
371}
372
373/*******************************************************************************
374 * This function takes a pointer to an affinity node in the topology tree and
375 * a target state. State of a non-leaf node needs to be converted to a reference
376 * count. State of a leaf node can be set directly.
377 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100378void psci_set_state(aff_map_node_t *node, unsigned short state)
Achin Gupta75f73672013-12-05 16:33:10 +0000379{
380 assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL);
381
382 /*
383 * For an affinity level higher than a cpu, the state is used
384 * to decide whether the reference count is incremented or
385 * decremented. Entry into the ON_PENDING state does not have
386 * effect.
387 */
388 if (node->level > MPIDR_AFFLVL0) {
389 switch (state) {
390 case PSCI_STATE_ON:
391 node->ref_count++;
392 break;
393 case PSCI_STATE_OFF:
394 case PSCI_STATE_SUSPEND:
395 node->ref_count--;
396 break;
397 case PSCI_STATE_ON_PENDING:
398 /*
399 * An affinity level higher than a cpu will not undergo
400 * a state change when it is about to be turned on
401 */
402 return;
403 default:
404 assert(0);
405 }
406 } else {
407 node->state &= ~(PSCI_STATE_MASK << PSCI_STATE_SHIFT);
408 node->state |= (state & PSCI_STATE_MASK) << PSCI_STATE_SHIFT;
409 }
410}
411
412/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100413 * An affinity level could be on, on_pending, suspended or off. These are the
Achin Gupta3140a9e2013-12-02 16:23:12 +0000414 * logical states it can be in. Physically either it is off or on. When it is in
415 * the state on_pending then it is about to be turned on. It is not possible to
Achin Gupta4f6ad662013-10-25 09:08:21 +0100416 * tell whether that's actually happenned or not. So we err on the side of
417 * caution & treat the affinity level as being turned off.
418 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100419unsigned short psci_get_phys_state(aff_map_node_t *node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100420{
Achin Gupta75f73672013-12-05 16:33:10 +0000421 unsigned int state;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100422
Achin Gupta75f73672013-12-05 16:33:10 +0000423 state = psci_get_state(node);
424 return get_phys_state(state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100425}
426
427/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000428 * This function takes an array of pointers to affinity instance nodes in the
429 * topology tree and calls the physical power on handler for the corresponding
430 * affinity levels
431 ******************************************************************************/
Achin Gupta56bcdc22014-07-28 00:15:23 +0100432static int psci_call_power_on_handlers(aff_map_node_t *mpidr_nodes[],
Achin Gupta0959db52013-12-02 17:33:04 +0000433 int start_afflvl,
434 int end_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100435 afflvl_power_on_finisher_t *pon_handlers)
Achin Gupta0959db52013-12-02 17:33:04 +0000436{
437 int rc = PSCI_E_INVALID_PARAMS, level;
Dan Handleye2712bc2014-04-10 15:37:22 +0100438 aff_map_node_t *node;
Achin Gupta0959db52013-12-02 17:33:04 +0000439
440 for (level = end_afflvl; level >= start_afflvl; level--) {
441 node = mpidr_nodes[level];
442 if (node == NULL)
443 continue;
444
445 /*
446 * If we run into any trouble while powering up an
447 * affinity instance, then there is no recovery path
448 * so simply return an error and let the caller take
449 * care of the situation.
450 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100451 rc = pon_handlers[level](node);
Achin Gupta0959db52013-12-02 17:33:04 +0000452 if (rc != PSCI_E_SUCCESS)
453 break;
454 }
455
456 return rc;
457}
458
459/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100460 * Generic handler which is called when a cpu is physically powered on. It
Achin Gupta0959db52013-12-02 17:33:04 +0000461 * traverses through all the affinity levels performing generic, architectural,
Achin Gupta4f6ad662013-10-25 09:08:21 +0100462 * platform setup and state management e.g. for a cluster that's been powered
463 * on, it will call the platform specific code which will enable coherency at
464 * the interconnect level. For a cpu it could mean turning on the MMU etc.
465 *
Achin Gupta0959db52013-12-02 17:33:04 +0000466 * The state of all the relevant affinity levels is changed after calling the
467 * affinity level specific handlers as their actions would depend upon the state
468 * the affinity level is exiting from.
469 *
470 * The affinity level specific handlers are called in descending order i.e. from
471 * the highest to the lowest affinity level implemented by the platform because
472 * to turn on affinity level X it is neccesary to turn on affinity level X + 1
473 * first.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100474 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100475void psci_afflvl_power_on_finish(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000476 int end_afflvl,
Dan Handleye2712bc2014-04-10 15:37:22 +0100477 afflvl_power_on_finisher_t *pon_handlers)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100478{
Dan Handleye2712bc2014-04-10 15:37:22 +0100479 mpidr_aff_map_nodes_t mpidr_nodes;
Achin Gupta0959db52013-12-02 17:33:04 +0000480 int rc;
Achin Guptaf6b9e992014-07-31 11:19:11 +0100481 unsigned int max_phys_off_afflvl;
482
Achin Gupta4f6ad662013-10-25 09:08:21 +0100483
Achin Gupta4f6ad662013-10-25 09:08:21 +0100484 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000485 * Collect the pointers to the nodes in the topology tree for
486 * each affinity instance in the mpidr. If this function does
487 * not return successfully then either the mpidr or the affinity
488 * levels are incorrect. Either case is an irrecoverable error.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100489 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100490 rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
Achin Gupta0959db52013-12-02 17:33:04 +0000491 start_afflvl,
492 end_afflvl,
493 mpidr_nodes);
James Morrissey40a6f642014-02-10 14:24:36 +0000494 if (rc != PSCI_E_SUCCESS)
495 panic();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100496
497 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000498 * This function acquires the lock corresponding to each affinity
499 * level so that by the time all locks are taken, the system topology
500 * is snapshot and state management can be done safely.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100501 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100502 psci_acquire_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000503 end_afflvl,
504 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100505
Achin Guptaf6b9e992014-07-31 11:19:11 +0100506 max_phys_off_afflvl = psci_find_max_phys_off_afflvl(start_afflvl,
507 end_afflvl,
508 mpidr_nodes);
509 assert(max_phys_off_afflvl != PSCI_INVALID_DATA);
510
511 /*
512 * Stash the highest affinity level that will come out of the OFF or
513 * SUSPEND states.
514 */
515 psci_set_max_phys_off_afflvl(max_phys_off_afflvl);
516
Achin Gupta4f6ad662013-10-25 09:08:21 +0100517 /* Perform generic, architecture and platform specific handling */
Achin Gupta0959db52013-12-02 17:33:04 +0000518 rc = psci_call_power_on_handlers(mpidr_nodes,
519 start_afflvl,
520 end_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100521 pon_handlers);
James Morrissey40a6f642014-02-10 14:24:36 +0000522 if (rc != PSCI_E_SUCCESS)
523 panic();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100524
525 /*
Achin Guptacab78e42014-07-28 00:09:01 +0100526 * This function updates the state of each affinity instance
527 * corresponding to the mpidr in the range of affinity levels
528 * specified.
529 */
530 psci_do_afflvl_state_mgmt(start_afflvl,
531 end_afflvl,
532 mpidr_nodes,
533 PSCI_STATE_ON);
534
535 /*
Achin Guptaf6b9e992014-07-31 11:19:11 +0100536 * Invalidate the entry for the highest affinity level stashed earlier.
537 * This ensures that any reads of this variable outside the power
538 * up/down sequences return PSCI_INVALID_DATA
539 */
540 psci_set_max_phys_off_afflvl(PSCI_INVALID_DATA);
541
542 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000543 * This loop releases the lock corresponding to each affinity level
544 * in the reverse order to which they were acquired.
545 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100546 psci_release_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000547 end_afflvl,
548 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100549}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000550
551/*******************************************************************************
552 * This function initializes the set of hooks that PSCI invokes as part of power
553 * management operation. The power management hooks are expected to be provided
554 * by the SPD, after it finishes all its initialization
555 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100556void psci_register_spd_pm_hook(const spd_pm_ops_t *pm)
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000557{
558 psci_spd_pm = pm;
559}
Juan Castillo4dc4a472014-08-12 11:17:06 +0100560
561/*******************************************************************************
562 * This function prints the state of all affinity instances present in the
563 * system
564 ******************************************************************************/
565void psci_print_affinity_map(void)
566{
567#if LOG_LEVEL >= LOG_LEVEL_INFO
568 aff_map_node_t *node;
569 unsigned int idx;
570 /* This array maps to the PSCI_STATE_X definitions in psci.h */
571 static const char *psci_state_str[] = {
572 "ON",
573 "OFF",
574 "ON_PENDING",
575 "SUSPEND"
576 };
577
578 INFO("PSCI Affinity Map:\n");
579 for (idx = 0; idx < PSCI_NUM_AFFS ; idx++) {
580 node = &psci_aff_map[idx];
581 if (!(node->state & PSCI_AFF_PRESENT)) {
582 continue;
583 }
584 INFO(" AffInst: Level %u, MPID 0x%lx, State %s\n",
585 node->level, node->mpidr,
586 psci_state_str[psci_get_state(node)]);
587 }
588#endif
589}