blob: f2e1112a69d6fd9ec5b4ae294be3439831b9831e [file] [log] [blame]
Biju Das4ec2d8f2020-12-16 08:57:59 +00001#
2# Copyright (c) 2018-2020, Renesas Electronics Corporation. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7PROGRAMMABLE_RESET_ADDRESS := 0
8COLD_BOOT_SINGLE_CPU := 1
9ARM_CCI_PRODUCT_ID := 500
10TRUSTED_BOARD_BOOT := 1
11RESET_TO_BL31 := 1
12GENERATE_COT := 1
13BL2_AT_EL3 := 1
14ENABLE_SVE_FOR_NS := 0
15MULTI_CONSOLE_API := 1
16
17CRASH_REPORTING := 1
18HANDLE_EA_EL3_FIRST := 1
19
20$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
21
22ifeq (${SPD},none)
23 SPD_NONE:=1
24 $(eval $(call add_define,SPD_NONE))
25endif
26
27# LSI setting common define
28RCAR_H3:=0
29RCAR_M3:=1
30RCAR_M3N:=2
31RCAR_E3:=3
32RCAR_H3N:=4
33RCAR_D3:=5
34RCAR_V3M:=6
35RCAR_AUTO:=99
36$(eval $(call add_define,RCAR_H3))
37$(eval $(call add_define,RCAR_M3))
38$(eval $(call add_define,RCAR_M3N))
39$(eval $(call add_define,RCAR_E3))
40$(eval $(call add_define,RCAR_H3N))
41$(eval $(call add_define,RCAR_D3))
42$(eval $(call add_define,RCAR_V3M))
43$(eval $(call add_define,RCAR_AUTO))
44RCAR_CUT_10:=0
45RCAR_CUT_11:=1
46RCAR_CUT_13:=3
47RCAR_CUT_20:=10
48RCAR_CUT_30:=20
49$(eval $(call add_define,RCAR_CUT_10))
50$(eval $(call add_define,RCAR_CUT_11))
51$(eval $(call add_define,RCAR_CUT_13))
52$(eval $(call add_define,RCAR_CUT_20))
53$(eval $(call add_define,RCAR_CUT_30))
54
55# Enable workarounds for selected Cortex-A53 erratas.
56ERRATA_A53_835769 := 1
57ERRATA_A53_843419 := 1
58ERRATA_A53_855873 := 1
59
60# Enable workarounds for selected Cortex-A57 erratas.
61ERRATA_A57_859972 := 1
62ERRATA_A57_813419 := 1
63
64PLAT_INCLUDES := -Iplat/renesas/common/include/registers \
65 -Iplat/renesas/common/include \
66 -Iplat/renesas/common
67
68RCAR_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
69 drivers/arm/gic/v2/gicv2_main.c \
70 drivers/arm/gic/v2/gicv2_helpers.c \
71 plat/common/plat_gicv2.c
72
73BL2_SOURCES += ${RCAR_GIC_SOURCES} \
74 lib/cpus/aarch64/cortex_a53.S \
75 lib/cpus/aarch64/cortex_a57.S \
76 ${LIBFDT_SRCS} \
77 common/desc_image_load.c \
78 drivers/renesas/common/common.c \
79 drivers/io/io_storage.c
80
81BL31_SOURCES += ${RCAR_GIC_SOURCES} \
82 lib/cpus/aarch64/cortex_a53.S \
83 lib/cpus/aarch64/cortex_a57.S \
84 plat/common/plat_psci_common.c \
85 drivers/renesas/common/common.c \
86 drivers/arm/cci/cci.c