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Ahmad Fatoum86ccc012020-01-29 16:04:18 +01001/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
2/*
3 * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
4 * Copyright (C) 2020 Ahmad Fatoum, Pengutronix
5 */
6
7#include "stm32mp15-pinctrl.dtsi"
8
9&i2c4 {
10 pinctrl-names = "default";
11 pinctrl-0 = <&i2c4_pins_a>;
12 clock-frequency = <400000>;
13 i2c-scl-rising-time-ns = <185>;
14 i2c-scl-falling-time-ns = <20>;
15 status = "okay";
16
17 pmic: stpmic@33 {
18 compatible = "st,stpmic1";
19 reg = <0x33>;
20 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
21 interrupt-controller;
22 #interrupt-cells = <2>;
23
24 regulators {
25 compatible = "st,stpmic1-regulators";
26
27 ldo1-supply = <&v3v3>;
28 ldo6-supply = <&v3v3>;
29 pwr_sw1-supply = <&bst_out>;
30
31 vddcore: buck1 {
32 regulator-name = "vddcore";
33 regulator-min-microvolt = <1200000>;
34 regulator-max-microvolt = <1350000>;
35 regulator-always-on;
36 regulator-initial-mode = <0>;
37 regulator-over-current-protection;
38 };
39
40 vdd_ddr: buck2 {
41 regulator-name = "vdd_ddr";
42 regulator-min-microvolt = <1350000>;
43 regulator-max-microvolt = <1350000>;
44 regulator-always-on;
45 regulator-initial-mode = <0>;
46 regulator-over-current-protection;
47 };
48
49 vdd: buck3 {
50 regulator-name = "vdd";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-always-on;
54 st,mask-reset;
55 regulator-initial-mode = <0>;
56 regulator-over-current-protection;
57 };
58
59 v3v3: buck4 {
60 regulator-name = "v3v3";
61 regulator-min-microvolt = <3300000>;
62 regulator-max-microvolt = <3300000>;
63 regulator-always-on;
64 regulator-over-current-protection;
65 regulator-initial-mode = <0>;
66 };
67
68 v1v8_audio: ldo1 {
69 regulator-name = "v1v8_audio";
70 regulator-min-microvolt = <1800000>;
71 regulator-max-microvolt = <1800000>;
72 regulator-always-on;
73 };
74
75 v3v3_hdmi: ldo2 {
76 regulator-name = "v3v3_hdmi";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
79 regulator-always-on;
80 };
81
82 vtt_ddr: ldo3 {
83 regulator-name = "vtt_ddr";
Ahmad Fatoum86ccc012020-01-29 16:04:18 +010084 regulator-always-on;
85 regulator-over-current-protection;
Ahmad Fatoum9d3c53c2022-06-02 06:28:31 +020086 st,regulator-sink-source;
Ahmad Fatoum86ccc012020-01-29 16:04:18 +010087 };
88
89 vdd_usb: ldo4 {
90 regulator-name = "vdd_usb";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 };
94
95 vdda: ldo5 {
96 regulator-name = "vdda";
97 regulator-min-microvolt = <2900000>;
98 regulator-max-microvolt = <2900000>;
99 regulator-boot-on;
100 };
101
102 v1v2_hdmi: ldo6 {
103 regulator-name = "v1v2_hdmi";
104 regulator-min-microvolt = <1200000>;
105 regulator-max-microvolt = <1200000>;
106 regulator-always-on;
107 };
108
109 vref_ddr: vref_ddr {
110 regulator-name = "vref_ddr";
111 regulator-always-on;
Ahmad Fatoum86ccc012020-01-29 16:04:18 +0100112 };
113
114 bst_out: boost {
115 regulator-name = "bst_out";
116 };
117
118 vbus_otg: pwr_sw1 {
119 regulator-name = "vbus_otg";
120 regulator-active-discharge;
121 };
122
123 vbus_sw: pwr_sw2 {
124 regulator-name = "vbus_sw";
125 regulator-active-discharge;
126 };
127 };
128
129 pmic_watchdog: watchdog {
130 compatible = "st,stpmic1-wdt";
131 status = "disabled";
132 };
133 };
134};
135
136&rng1 {
137 status = "okay";
138};
139
140/* ATF Specific */
141#include <dt-bindings/clock/stm32mp1-clksrc.h>
142
143/ {
144 aliases {
145 gpio0 = &gpioa;
146 gpio1 = &gpiob;
147 gpio2 = &gpioc;
148 gpio3 = &gpiod;
149 gpio4 = &gpioe;
150 gpio5 = &gpiof;
151 gpio6 = &gpiog;
152 gpio7 = &gpioh;
153 gpio8 = &gpioi;
154 gpio25 = &gpioz;
155 i2c3 = &i2c4;
156 };
157};
158
159&bsec {
160 board_id: board_id@ec {
161 reg = <0xec 0x4>;
162 st,non-secure-otp;
163 };
164};
165
166&clk_hse {
167 st,digbypass;
168};
169
Johann Neuhausera5ef16a2022-07-08 15:22:05 +0200170&cpu0 {
Ahmad Fatoum86ccc012020-01-29 16:04:18 +0100171 cpu-supply = <&vddcore>;
172};
173
Johann Neuhausera5ef16a2022-07-08 15:22:05 +0200174&cpu1 {
Ahmad Fatoum86ccc012020-01-29 16:04:18 +0100175 cpu-supply = <&vddcore>;
176};
177
178&hash1 {
179 status = "okay";
180};
181
182/* CLOCK init */
183&rcc {
Ahmad Fatoum86ccc012020-01-29 16:04:18 +0100184 st,clksrc = <
185 CLK_MPU_PLL1P
186 CLK_AXI_PLL2P
187 CLK_MCU_PLL3P
188 CLK_PLL12_HSE
189 CLK_PLL3_HSE
190 CLK_PLL4_HSE
191 CLK_RTC_LSE
192 CLK_MCO1_DISABLED
193 CLK_MCO2_DISABLED
194 >;
195
196 st,clkdiv = <
197 1 /*MPU*/
198 0 /*AXI*/
199 0 /*MCU*/
200 1 /*APB1*/
201 1 /*APB2*/
202 1 /*APB3*/
203 1 /*APB4*/
204 2 /*APB5*/
205 23 /*RTC*/
206 0 /*MCO1*/
207 0 /*MCO2*/
208 >;
209
210 st,pkcs = <
211 CLK_CKPER_HSE
212 CLK_FMC_ACLK
213 CLK_QSPI_ACLK
214 CLK_ETH_PLL4P
215 CLK_SDMMC12_PLL4P
216 CLK_DSI_DSIPLL
217 CLK_STGEN_HSE
218 CLK_USBPHY_HSE
219 CLK_SPI2S1_PLL3Q
220 CLK_SPI2S23_PLL3Q
221 CLK_SPI45_HSI
222 CLK_SPI6_HSI
223 CLK_I2C46_HSI
224 CLK_SDMMC3_PLL4P
225 CLK_USBO_USBPHY
226 CLK_ADC_CKPER
227 CLK_CEC_LSE
228 CLK_I2C12_HSI
229 CLK_I2C35_HSI
230 CLK_UART1_HSI
231 CLK_UART24_HSI
232 CLK_UART35_HSI
233 CLK_UART6_HSI
234 CLK_UART78_HSI
235 CLK_SPDIF_PLL4P
236 CLK_FDCAN_PLL4R
237 CLK_SAI1_PLL3Q
238 CLK_SAI2_PLL3Q
239 CLK_SAI3_PLL3Q
240 CLK_SAI4_PLL3Q
241 CLK_RNG1_LSI
242 CLK_RNG2_LSI
243 CLK_LPTIM1_PCLK1
244 CLK_LPTIM23_PCLK3
245 CLK_LPTIM45_LSE
246 >;
247
248 /* VCO = 1300.0 MHz => P = 650 (CPU) */
249 pll1: st,pll@0 {
250 compatible = "st,stm32mp1-pll";
251 reg = <0>;
252 cfg = < 2 80 0 0 0 PQR(1,0,0) >;
253 frac = < 0x800 >;
254 };
255
256 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
257 pll2: st,pll@1 {
258 compatible = "st,stm32mp1-pll";
259 reg = <1>;
260 cfg = <2 65 1 0 0 PQR(1,1,1)>;
261 frac = <0x1400>;
262 };
263
264 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
265 pll3: st,pll@2 {
266 compatible = "st,stm32mp1-pll";
267 reg = <2>;
268 cfg = <1 33 1 16 36 PQR(1,1,1)>;
269 frac = <0x1a04>;
270 };
271
272 /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
273 pll4: st,pll@3 {
274 compatible = "st,stm32mp1-pll";
275 reg = <3>;
276 cfg = <3 98 5 7 7 PQR(1,1,1)>;
277 };
278};