blob: 8f18531a132dbb4eda059a481509839bea2698e6 [file] [log] [blame]
Yatharth Kocharede39cb2016-11-14 12:01:04 +00001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Yatharth Kocharede39cb2016-11-14 12:01:04 +00005 */
6
7#include <assert.h>
8#include <bl_common.h>
9#include <desc_image_load.h>
10#include <plat_arm.h>
11
12#if JUNO_AARCH32_EL3_RUNTIME
13/*******************************************************************************
14 * This function changes the spsr for BL32 image to bypass
15 * the check in BL1 AArch64 exception handler. This is needed in the aarch32
16 * boot flow as the core comes up in aarch64 and to enter the BL32 image a warm
17 * reset in aarch32 state is required.
18 ******************************************************************************/
19int bl2_plat_handle_post_image_load(unsigned int image_id)
20{
21 int err = arm_bl2_handle_post_image_load(image_id);
22
23 if (!err && (image_id == BL32_IMAGE_ID)) {
24 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
25 assert(bl_mem_params);
26 bl_mem_params->ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
27 DISABLE_ALL_EXCEPTIONS);
28 }
29
30 return err;
31}
32#endif /* JUNO_AARCH32_EL3_RUNTIME */