Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / 453fe32276bbc2850576705d2c8d7b3e1ff3c743 / . / docs / glossary.rst
blob: f19897c7d881a40acdc6ab04ca3c2e9866a6de3b [file] [log] [blame]
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]1Glossary
2========
3
4This glossary provides definitions for terms and abbreviations used in the TF-A
5documentation.
6
7You can find additional definitions in the `Arm Glossary`_.
8
9.. glossary::
10 :sorted:
11
12 AArch32
13 32-bit execution state of the ARMv8 ISA
14
15 AArch64
16 64-bit execution state of the ARMv8 ISA
17
Chris Kaycda89212021-08-17 16:24:57 +0100[diff] [blame]18 AMU
19 Activity Monitor Unit, a hardware monitoring unit introduced by FEAT_AMUv1
20 that exposes CPU core runtime metrics as a set of counter registers.
21
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]22 API
23 Application Programming Interface
24
Manish V Badarkhea59fa012020-07-31 08:38:49 +0100[diff] [blame]25 AT
26 Address Translation
27
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]28 BTI
29 Branch Target Identification. An Armv8.5 extension providing additional
30 control flow integrity around indirect branches and their targets.
31
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]32 CoT
33 COT
34 Chain of Trust
35
36 CSS
37 Compute Sub-System
38
39 CVE
40 Common Vulnerabilities and Exposures. A CVE document is commonly used to
41 describe a publicly-known security vulnerability.
42
Tamas Bana49698c2023-06-06 13:14:45 +0200[diff] [blame]43 DICE
44 Device Identifier Composition Engine
45
Manish V Badarkhee39a3a82022-06-29 14:09:47 +0100[diff] [blame]46 DCE
47 DRTM Configuration Environment
48
49 D-CRTM
50 Dynamic Code Root of Trust for Measurement
51
52 DLME
53 Dynamically Launched Measured Environment
54
55 DRTM
56 Dynamic Root of Trust for Measurement
57
Tamas Bana49698c2023-06-06 13:14:45 +0200[diff] [blame]58 DPE
59 DICE Protection Environment
60
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]61 DS-5
62 Arm Development Studio 5
63
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]64 DSU
65 DynamIQ Shared Unit
66
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]67 DT
68 Device Tree
69
Louis Mayencourt8ac387c2019-11-08 15:09:15 +0000[diff] [blame]70 DTB
71 Device Tree Blob
72
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]73 EL
74 Exception Level
75
76 EHF
77 Exception Handling Framework
78
Sona Mathew6315c582023-03-15 09:40:36 -0500[diff] [blame]79 ERRATA_ABI
80 Errata management firmware interface
81
Louis Mayencourt8ac387c2019-11-08 15:09:15 +0000[diff] [blame]82 FCONF
83 Firmware Configuration Framework
84
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]85 FDT
86 Flattened Device Tree
87
Olivier Deprez2b0be752021-09-01 10:25:21 +0200[diff] [blame]88 FF-A
89 Firmware Framework for Arm A-profile
J-Alves2672cde2020-05-07 18:42:25 +0100[diff] [blame]90
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]91 FIP
92 Firmware Image Package
93
94 FVP
95 Fixed Virtual Platform
96
97 FWU
98 FirmWare Update
99
100 GIC
101 Generic Interrupt Controller
102
Tamas Ban0627f7a2024-09-02 13:35:21 +0200[diff] [blame]103 HES
104 Arm CCA Hardware Enforced Security
105
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]106 ISA
107 Instruction Set Architecture
108
109 Linaro
110 A collaborative engineering organization consolidating
111 and optimizing open source software and tools for the Arm architecture.
112
Shruti Gupta795af712022-09-27 14:21:13 +0100[diff] [blame]113 LSP
114 A logical secure partition managed by SPM
115
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]116 MMU
117 Memory Management Unit
118
119 MPAM
120 Memory Partitioning And Monitoring. An optional Armv8.4 extension.
121
Chris Kay03be39d2021-05-05 13:38:30 +0100[diff] [blame]122 MPMM
123 Maximum Power Mitigation Mechanism, an optional power management mechanism
124 supported by some Arm Armv9-A cores.
125
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]126 MPIDR
127 Multiprocessor Affinity Register
128
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]129 MTE
130 Memory Tagging Extension. An optional Armv8.5 extension that enables
131 hardware-assisted memory tagging.
132
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]133 OEN
134 Owning Entity Number
135
136 OP-TEE
137 Open Portable Trusted Execution Environment. An example of a :term:`TEE`
138
139 OTE
140 Open-source Trusted Execution Environment
141
Abhi Singhbff33ec2024-10-08 16:04:00 -0500[diff] [blame]142 PCR
143 Platform Configuration Register
144
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]145 PDD
146 Platform Design Document
147
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]148 PAUTH
149 Pointer Authentication. An optional extension introduced in Armv8.3.
150
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]151 PMF
152 Performance Measurement Framework
153
J-Alves2672cde2020-05-07 18:42:25 +0100[diff] [blame]154 PSA
155 Platform Security Architecture
156
Manish V Badarkhe985af7e2023-12-21 17:54:30 +0000[diff] [blame]157 PSR
158 Platform Security Requirements
159
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]160 PSCI
161 Power State Coordination Interface
162
163 RAS
164 Reliability, Availability, and Serviceability extensions. A mandatory
165 extension for the Armv8.2 architecture and later. An optional extension to
166 the base Armv8 architecture.
167
168 ROT
169 Root of Trust
170
Tamas Ban0627f7a2024-09-02 13:35:21 +0200[diff] [blame]171 RSE
172 Runtime Security Engine
173
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]174 SCMI
175 System Control and Management Interface
176
177 SCP
178 System Control Processor
179
180 SDEI
181 Software Delegated Exception Interface
182
183 SDS
184 Shared Data Storage
185
186 SEA
187 Synchronous External Abort
188
189 SiP
190 SIP
191 Silicon Provider
192
193 SMC
194 Secure Monitor Call
195
196 SMCCC
197 :term:`SMC` Calling Convention
198
199 SoC
200 System on Chip
201
202 SP
203 Secure Partition
204
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]205 SPD
206 Secure Payload Dispatcher
207
208 SPM
209 Secure Partition Manager
210
Manish V Badarkhe9d971222023-04-03 13:50:59 +0100[diff] [blame]211 SRTM
212 Static Root of Trust for Measurement
213
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]214 SSBS
215 Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
216 bit can be set by software to allow or prevent the hardware from
217 performing speculative operations.
218
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]219 SVE
220 Scalable Vector Extension
221
222 TBB
223 Trusted Board Boot
224
225 TBBR
226 Trusted Board Boot Requirements
227
Manish V Badarkhee39a3a82022-06-29 14:09:47 +0100[diff] [blame]228 TCB
229 Trusted Compute Base
230
Manish V Badarkhe9d971222023-04-03 13:50:59 +0100[diff] [blame]231 TCG
232 Trusted Computing Group
233
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]234 TEE
235 Trusted Execution Environment
236
237 TF-A
238 Trusted Firmware-A
239
240 TF-M
241 Trusted Firmware-M
242
243 TLB
244 Translation Lookaside Buffer
245
246 TLK
247 Trusted Little Kernel. A Trusted OS from NVIDIA.
248
Manish V Badarkhe9d971222023-04-03 13:50:59 +0100[diff] [blame]249 TPM
250 Trusted Platform Module
251
Jimmy Brisson26c5b5c2020-06-22 14:18:42 -0500[diff] [blame]252 TRNG
Sandrine Bailleux736a5922023-04-27 13:29:13 +0200[diff] [blame]253 True Random Number Generator (hardware based)
Jimmy Brisson26c5b5c2020-06-22 14:18:42 -0500[diff] [blame]254
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]255 TSP
256 Test Secure Payload
257
258 TZC
259 TrustZone Controller
260
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]261 UBSAN
262 Undefined Behavior Sanitizer
263
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]264 UEFI
265 Unified Extensible Firmware Interface
266
267 WDOG
268 Watchdog
269
270 XLAT
271 Translation (abbr.). For example, "XLAT table".
272
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]273.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary