blob: f1a13d290aef742ed30ea7daed30240f832f7bcd [file] [log] [blame]
Antonio Nino Diazc326c342019-01-11 11:20:10 +00001/*
Andre Przywarabb0db3b2023-01-25 12:26:14 +00002 * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
Antonio Nino Diazc326c342019-01-11 11:20:10 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef ARCH_FEATURES_H
8#define ARCH_FEATURES_H
9
10#include <stdbool.h>
11
12#include <arch_helpers.h>
Andre Przywarae8920f62022-11-10 14:28:01 +000013#include <common/feat_detect.h>
Antonio Nino Diazc326c342019-01-11 11:20:10 +000014
Andre Przywarabb0db3b2023-01-25 12:26:14 +000015#define ISOLATE_FIELD(reg, feat) \
16 ((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK)))
17
Antonio Nino Diazd29d21e2019-02-06 09:23:04 +000018static inline bool is_armv7_gentimer_present(void)
19{
20 /* The Generic Timer is always present in an ARMv8-A implementation */
21 return true;
22}
23
Daniel Boulby44b43332020-11-25 16:36:46 +000024static inline bool is_armv8_1_pan_present(void)
25{
26 return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_PAN_SHIFT) &
27 ID_AA64MMFR1_EL1_PAN_MASK) != 0U;
28}
29
Andre Przywara98908b32022-11-17 16:42:09 +000030static inline unsigned int read_feat_vhe_id_field(void)
31{
32 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE);
33}
34
35static inline bool is_feat_vhe_supported(void)
Daniel Boulby44b43332020-11-25 16:36:46 +000036{
Andre Przywara98908b32022-11-17 16:42:09 +000037 if (ENABLE_FEAT_VHE == FEAT_STATE_DISABLED) {
38 return false;
39 }
40
41 if (ENABLE_FEAT_VHE == FEAT_STATE_ALWAYS) {
42 return true;
43 }
44
45 return read_feat_vhe_id_field() != 0U;
Daniel Boulby44b43332020-11-25 16:36:46 +000046}
47
Antonio Nino Diazc326c342019-01-11 11:20:10 +000048static inline bool is_armv8_2_ttcnp_present(void)
49{
50 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) &
51 ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
52}
53
Juan Pablo Condee089a172022-06-29 17:44:43 -040054static inline bool is_feat_pacqarma3_present(void)
55{
56 uint64_t mask_id_aa64isar2 =
57 (ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) |
58 (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT);
59
60 /* If any of the fields is not zero, QARMA3 algorithm is present */
61 return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U;
62}
63
Antonio Nino Diaz25cda672019-02-19 11:53:51 +000064static inline bool is_armv8_3_pauth_present(void)
65{
Juan Pablo Condee089a172022-06-29 17:44:43 -040066 uint64_t mask_id_aa64isar1 =
67 (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
68 (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
69 (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
70 (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
Antonio Nino Diaz25cda672019-02-19 11:53:51 +000071
Juan Pablo Condee089a172022-06-29 17:44:43 -040072 /*
73 * If any of the fields is not zero or QARMA3 is present,
74 * PAuth is present
75 */
76 return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U ||
77 is_feat_pacqarma3_present());
Antonio Nino Diaz25cda672019-02-19 11:53:51 +000078}
79
Daniel Boulby60786e72021-10-22 11:37:34 +010080static inline bool is_armv8_4_dit_present(void)
81{
82 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
83 ID_AA64PFR0_DIT_MASK) == 1U;
84}
85
Sathees Balya74155972019-01-25 11:36:01 +000086static inline bool is_armv8_4_ttst_present(void)
87{
88 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
89 ID_AA64MMFR2_EL1_ST_MASK) == 1U;
90}
91
Alexei Fedorov90f2e882019-05-24 12:17:09 +010092static inline bool is_armv8_5_bti_present(void)
93{
94 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) &
95 ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
96}
97
Soby Mathew830f0ad2019-07-12 09:23:38 +010098static inline unsigned int get_armv8_5_mte_support(void)
99{
100 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
101 ID_AA64PFR1_EL1_MTE_MASK);
102}
103
Olivier Deprez2bae35f2020-04-16 13:39:06 +0200104static inline bool is_armv8_4_sel2_present(void)
105{
106 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SEL2_SHIFT) &
107 ID_AA64PFR0_SEL2_MASK) == 1ULL;
108}
109
johpow013e24c162020-04-22 14:05:13 -0500110static inline bool is_armv8_6_twed_present(void)
111{
112 return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_TWED_SHIFT) &
113 ID_AA64MMFR1_EL1_TWED_MASK) == ID_AA64MMFR1_EL1_TWED_SUPPORTED);
114}
115
Andre Przywarae8920f62022-11-10 14:28:01 +0000116static unsigned int read_feat_fgt_id_field(void)
Jimmy Brissonecc3c672020-04-16 10:47:56 -0500117{
Andre Przywarabb0db3b2023-01-25 12:26:14 +0000118 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT);
Andre Przywarae8920f62022-11-10 14:28:01 +0000119}
120
121static inline bool is_feat_fgt_supported(void)
122{
123 if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) {
124 return false;
125 }
126
127 if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) {
128 return true;
129 }
130
131 return read_feat_fgt_id_field() != 0U;
Jimmy Brissonecc3c672020-04-16 10:47:56 -0500132}
133
Jimmy Brisson83573892020-04-16 10:48:02 -0500134static inline unsigned long int get_armv8_6_ecv_support(void)
135{
136 return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_ECV_SHIFT) &
137 ID_AA64MMFR0_EL1_ECV_MASK);
138}
139
Tomas Pilar6fd816e2020-10-28 15:34:12 +0000140static inline bool is_armv8_5_rng_present(void)
141{
142 return ((read_id_aa64isar0_el1() >> ID_AA64ISAR0_RNDR_SHIFT) &
143 ID_AA64ISAR0_RNDR_MASK);
144}
145
Mark Brownc37eee72023-03-14 20:13:03 +0000146static unsigned int read_feat_tcrx_id_field(void)
147{
148 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX);
149}
150
151static inline bool is_feat_tcr2_supported(void)
152{
153 if (ENABLE_FEAT_TCR2 == FEAT_STATE_DISABLED) {
154 return false;
155 }
156
157 if (ENABLE_FEAT_TCR2 == FEAT_STATE_ALWAYS) {
158 return true;
159 }
160
161 return read_feat_tcrx_id_field() != 0U;
162}
163
Andre Przywara2c550e32022-11-10 14:41:07 +0000164/*******************************************************************************
165 * Functions to identify the presence of the Activity Monitors Extension
166 ******************************************************************************/
167static unsigned int read_feat_amu_id_field(void)
168{
Andre Przywarabb0db3b2023-01-25 12:26:14 +0000169 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU);
Andre Przywara2c550e32022-11-10 14:41:07 +0000170}
171
172static inline bool is_feat_amu_supported(void)
173{
174 if (ENABLE_FEAT_AMUv1 == FEAT_STATE_DISABLED) {
175 return false;
176 }
177
178 if (ENABLE_FEAT_AMUv1 == FEAT_STATE_ALWAYS) {
179 return true;
180 }
181
182 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1;
183}
184
johpow01fa59c6f2020-10-02 13:41:11 -0500185static inline bool is_armv8_6_feat_amuv1p1_present(void)
186{
Andre Przywara2c550e32022-11-10 14:41:07 +0000187 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1;
johpow01fa59c6f2020-10-02 13:41:11 -0500188}
189
Alexei Fedorov19933552020-05-26 13:16:41 +0100190/*
191 * Return MPAM version:
192 *
193 * 0x00: None Armv8.0 or later
194 * 0x01: v0.1 Armv8.4 or later
195 * 0x10: v1.0 Armv8.2 or later
196 * 0x11: v1.1 Armv8.4 or later
197 *
198 */
Andre Przywara84b86532022-11-17 16:42:09 +0000199static inline unsigned int read_feat_mpam_version(void)
Alexei Fedorov19933552020-05-26 13:16:41 +0100200{
201 return (unsigned int)((((read_id_aa64pfr0_el1() >>
202 ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
203 ((read_id_aa64pfr1_el1() >>
204 ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
205}
206
Andre Przywara84b86532022-11-17 16:42:09 +0000207static inline bool is_feat_mpam_supported(void)
208{
209 if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_DISABLED) {
210 return false;
211 }
212
213 if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_ALWAYS) {
214 return true;
215 }
216
217 return read_feat_mpam_version() != 0U;
218}
219
Andre Przywaraf20ad902022-11-15 11:45:19 +0000220static inline unsigned int read_feat_hcx_id_field(void)
221{
Andre Przywarabb0db3b2023-01-25 12:26:14 +0000222 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX);
Andre Przywaraf20ad902022-11-15 11:45:19 +0000223}
224
225static inline bool is_feat_hcx_supported(void)
johpow01f91e59f2021-08-04 19:38:18 -0500226{
Andre Przywaraf20ad902022-11-15 11:45:19 +0000227 if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) {
228 return false;
229 }
230
231 if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) {
232 return true;
233 }
234
235 return read_feat_hcx_id_field() != 0U;
johpow01f91e59f2021-08-04 19:38:18 -0500236}
237
Juan Pablo Conde42305f22022-07-12 16:40:29 -0400238static inline bool is_feat_rng_trap_present(void)
239{
240 return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) &
241 ID_AA64PFR1_EL1_RNDR_TRAP_MASK)
242 == ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED);
243}
244
Zelalem Aweke79e3d292021-07-08 16:51:14 -0500245static inline unsigned int get_armv9_2_feat_rme_support(void)
246{
247 /*
248 * Return the RME version, zero if not supported. This function can be
249 * used as both an integer value for the RME version or compared to zero
250 * to detect RME presence.
251 */
252 return (unsigned int)(read_id_aa64pfr0_el1() >>
253 ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK;
254}
255
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000256/*********************************************************************************
257 * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction)
258 ********************************************************************************/
259static inline bool is_armv8_0_feat_sb_present(void)
260{
261 return (((read_id_aa64isar1_el1() >> ID_AA64ISAR1_SB_SHIFT) &
262 ID_AA64ISAR1_SB_MASK) == ID_AA64ISAR1_SB_SUPPORTED);
263}
264
265/*********************************************************************************
266 * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2)
267 ********************************************************************************/
268static inline bool is_armv8_0_feat_csv2_2_present(void)
269{
270 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_CSV2_SHIFT) &
271 ID_AA64PFR0_CSV2_MASK) == ID_AA64PFR0_CSV2_2_SUPPORTED);
272}
273
274/**********************************************************************************
275 * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension)
276 *********************************************************************************/
Andre Przywaraf3e8cfc2022-11-17 16:42:09 +0000277static inline unsigned int read_feat_spe_id_field(void)
278{
279 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMS);
280}
281
282static inline bool is_feat_spe_supported(void)
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000283{
Andre Przywaraf3e8cfc2022-11-17 16:42:09 +0000284 if (ENABLE_SPE_FOR_NS == FEAT_STATE_DISABLED) {
285 return false;
286 }
287
288 if (ENABLE_SPE_FOR_NS == FEAT_STATE_ALWAYS) {
289 return true;
290 }
291
292 return read_feat_spe_id_field() != 0U;
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000293}
294
295/*******************************************************************************
296 * Function to identify the presence of FEAT_SVE (Scalable Vector Extension)
297 ******************************************************************************/
298static inline bool is_armv8_2_feat_sve_present(void)
299{
300 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) &
301 ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED);
302}
303
304/*******************************************************************************
305 * Function to identify the presence of FEAT_RAS (Reliability,Availability,
306 * and Serviceability Extension)
307 ******************************************************************************/
308static inline bool is_armv8_2_feat_ras_present(void)
309{
310 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) &
311 ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED);
312}
313
314/**************************************************************************
315 * Function to identify the presence of FEAT_DIT (Data Independent Timing)
316 *************************************************************************/
317static inline bool is_armv8_4_feat_dit_present(void)
318{
319 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
320 ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED);
321}
322
323/*************************************************************************
324 * Function to identify the presence of FEAT_TRF (TraceLift)
325 ************************************************************************/
Andre Przywara06ea44e2022-11-17 17:30:43 +0000326static inline unsigned int read_feat_trf_id_field(void)
327{
328 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT);
329}
330
331static inline bool is_feat_trf_supported(void)
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000332{
Andre Przywara06ea44e2022-11-17 17:30:43 +0000333 if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) {
334 return false;
335 }
336
337 if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) {
338 return true;
339 }
340
341 return read_feat_trf_id_field() != 0U;
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000342}
343
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000344/********************************************************************************
345 * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization
346 * Support)
347 *******************************************************************************/
348static inline unsigned int get_armv8_4_feat_nv_support(void)
349{
350 return (((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_NV_SHIFT) &
351 ID_AA64MMFR2_EL1_NV_MASK));
352}
353
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100354/*******************************************************************************
355 * Function to identify the presence of FEAT_BRBE (Branch Record Buffer
356 * Extension)
357 ******************************************************************************/
Andre Przywarac97c5512022-11-17 16:42:09 +0000358static inline unsigned int read_feat_brbe_id_field(void)
359{
360 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE);
361}
362
363static inline bool is_feat_brbe_supported(void)
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100364{
Andre Przywarac97c5512022-11-17 16:42:09 +0000365 if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) {
366 return false;
367 }
368
369 if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) {
370 return true;
371 }
372
373 return read_feat_brbe_id_field() != 0U;
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100374}
375
Jayanth Dodderi Chidananda793ccc2022-05-19 14:08:28 +0100376/*******************************************************************************
377 * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
378 ******************************************************************************/
Andre Przywara191eff62022-11-17 16:42:09 +0000379static inline unsigned int read_feat_trbe_id_field(void)
Jayanth Dodderi Chidananda793ccc2022-05-19 14:08:28 +0100380{
Andre Przywara191eff62022-11-17 16:42:09 +0000381 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER);
Jayanth Dodderi Chidananda793ccc2022-05-19 14:08:28 +0100382}
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100383
Andre Przywara191eff62022-11-17 16:42:09 +0000384static inline bool is_feat_trbe_supported(void)
385{
386 if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) {
387 return false;
388 }
389
390 if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) {
391 return true;
392 }
393
394 return read_feat_trbe_id_field() != 0U;
395
396}
Antonio Nino Diazc326c342019-01-11 11:20:10 +0000397#endif /* ARCH_FEATURES_H */