blob: 93967ad2815610084fa17ff7f4b0d5255cdda81d [file] [log] [blame]
Aditya Angadicdd7f632020-04-06 17:11:23 +05301# Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
2#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
6# Enable GICv4 extension with multichip driver
7GIC_ENABLE_V4_EXTN := 1
8GICV3_IMPL_GIC600_MULTICHIP := 1
9
10include plat/arm/css/sgi/sgi-common.mk
11
12RDDANIELXLR_BASE = plat/arm/board/rddanielxlr
13
14PLAT_INCLUDES += -I${RDDANIELXLR_BASE}/include/
15
16SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_zeus.S
17
18BL1_SOURCES += ${SGI_CPU_SOURCES} \
19 ${RDDANIELXLR_BASE}/rddanielxlr_err.c
20
21BL2_SOURCES += ${RDDANIELXLR_BASE}/rddanielxlr_plat.c \
22 ${RDDANIELXLR_BASE}/rddanielxlr_security.c \
23 ${RDDANIELXLR_BASE}/rddanielxlr_err.c \
24 lib/utils/mem_region.c \
25 plat/arm/common/arm_nor_psci_mem_protect.c
26
27BL31_SOURCES += ${SGI_CPU_SOURCES} \
28 ${RDDANIELXLR_BASE}/rddanielxlr_plat.c \
29 ${RDDANIELXLR_BASE}/rddanielxlr_topology.c \
30 drivers/cfi/v2m/v2m_flash.c \
31 drivers/arm/gic/v3/gic600_multichip.c \
32 lib/utils/mem_region.c \
33 plat/arm/common/arm_nor_psci_mem_protect.c
34
Vijayenthiran Subramaniam01ce6fe2020-07-14 15:51:37 +053035ifeq (${TRUSTED_BOARD_BOOT}, 1)
36BL1_SOURCES += ${RDDANIELXLR_BASE}/rddanielxlr_trusted_boot.c
37BL2_SOURCES += ${RDDANIELXLR_BASE}/rddanielxlr_trusted_boot.c
38endif
39
Aditya Angadicdd7f632020-04-06 17:11:23 +053040# Enable dynamic addition of MMAP regions in BL31
41BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
42
43# Add the FDT_SOURCES and options for Dynamic Config
Manish V Badarkhe64616a52020-05-31 08:53:40 +010044FDT_SOURCES += ${RDDANIELXLR_BASE}/fdts/${PLAT}_fw_config.dts \
45 ${RDDANIELXLR_BASE}/fdts/${PLAT}_tb_fw_config.dts
46FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
47TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Aditya Angadicdd7f632020-04-06 17:11:23 +053048
Manish V Badarkhe64616a52020-05-31 08:53:40 +010049# Add the FW_CONFIG to FIP and specify the same to certtool
50$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config))
Aditya Angadicdd7f632020-04-06 17:11:23 +053051# Add the TB_FW_CONFIG to FIP and specify the same to certtool
52$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config))
53
54$(eval $(call CREATE_SEQ,SEQ,4))
55ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ)))
56 $(error "Chip count for RD-Daniel Config-XLR should be either $(SEQ) \
57 currently it is set to ${CSS_SGI_CHIP_COUNT}.")
58endif
59
60FDT_SOURCES += ${RDDANIELXLR_BASE}/fdts/${PLAT}_nt_fw_config.dts
61NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
62
63# Add the NT_FW_CONFIG to FIP and specify the same to certtool
64$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
65
66override CTX_INCLUDE_AARCH32_REGS := 0