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Anson Huangb6294132018-06-05 16:05:59 +08001/*
2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz4b32e622018-08-16 16:52:57 +01007#include <stdint.h>
Anson Huangb6294132018-06-05 16:05:59 +08008
9#define MU_ATR0_OFFSET1 0x0
10#define MU_ARR0_OFFSET1 0x10
11#define MU_ASR_OFFSET1 0x20
12#define MU_ACR_OFFSET1 0x24
13#define MU_TR_COUNT1 4
14#define MU_RR_COUNT1 4
15
16#define MU_CR_GIEn_MASK1 (0xF << 28)
17#define MU_CR_RIEn_MASK1 (0xF << 24)
18#define MU_CR_TIEn_MASK1 (0xF << 20)
19#define MU_CR_GIRn_MASK1 (0xF << 16)
20#define MU_CR_NMI_MASK1 (1 << 3)
21#define MU_CR_Fn_MASK1 0x7
22
23#define MU_SR_TE0_MASK1 (1 << 23)
24#define MU_SR_RF0_MASK1 (1 << 27)
25#define MU_CR_RIE0_MASK1 (1 << 27)
26#define MU_CR_GIE0_MASK1 (1 << 31)
27
28#define MU_TR_COUNT 4
29#define MU_RR_COUNT 4
30
31void MU_Init(uint32_t base);
32void MU_SendMessage(uint32_t base, uint32_t regIndex, uint32_t msg);
33void MU_ReceiveMsg(uint32_t base, uint32_t regIndex, uint32_t *msg);
34void MU_EnableGeneralInt(uint32_t base, uint32_t index);
35void MU_EnableRxFullInt(uint32_t base, uint32_t index);
Anson Huangad192dc2019-01-24 16:09:52 +080036void MU_Resume(uint32_t base);