blob: 5211ace82f5d54370eacb3308427f26c60fdadf4 [file] [log] [blame]
Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
Ravi Patel2f34d362021-04-15 05:55:19 -07002 * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
Jay Buddhabhatti26e138a2022-12-21 23:03:35 -08003 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08004 *
dp-armfa3cf0b2017-05-03 09:38:09 +01005 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08006 */
7
Soren Brinkmann76fcae32016-03-06 20:16:27 -08008#include <assert.h>
Isla Mitchelle3631462017-07-14 10:46:32 +01009#include <errno.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <arch_helpers.h>
12#include <common/debug.h>
13#include <drivers/arm/gicv2.h>
14#include <lib/mmio.h>
15#include <lib/psci/psci.h>
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +000016#include <plat/arm/common/plat_arm.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000017#include <plat/common/platform.h>
18
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +000019#include <plat_private.h>
Soren Brinkmann76fcae32016-03-06 20:16:27 -080020#include "pm_client.h"
Jay Buddhabhatti26e138a2022-12-21 23:03:35 -080021#include "zynqmp_pm_api_sys.h"
Soren Brinkmann76fcae32016-03-06 20:16:27 -080022
Venkatesh Yadav Abbarapuc9505352022-05-16 17:29:04 +053023static uintptr_t zynqmp_sec_entry;
Soren Brinkmann76fcae32016-03-06 20:16:27 -080024
Venkatesh Yadav Abbarapuc9505352022-05-16 17:29:04 +053025static void zynqmp_cpu_standby(plat_local_state_t cpu_state)
Soren Brinkmann76fcae32016-03-06 20:16:27 -080026{
27 VERBOSE("%s: cpu_state: 0x%x\n", __func__, cpu_state);
28
29 dsb();
30 wfi();
31}
32
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +053033static int32_t zynqmp_pwr_domain_on(u_register_t mpidr)
Soren Brinkmann76fcae32016-03-06 20:16:27 -080034{
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +053035 uint32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080036 const struct pm_proc *proc;
Ravi Patel2f34d362021-04-15 05:55:19 -070037 uint32_t buff[3];
38 enum pm_ret_status ret;
Soren Brinkmann76fcae32016-03-06 20:16:27 -080039
40 VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
41
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053042 if (cpu_id == -1) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080043 return PSCI_E_INTERN_FAIL;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053044 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -080045 proc = pm_get_proc(cpu_id);
Ravi Patel2f34d362021-04-15 05:55:19 -070046
47 /* Check the APU proc status before wakeup */
48 ret = pm_get_node_status(proc->node_id, buff);
49 if ((ret != PM_RET_SUCCESS) || (buff[0] == PM_PROC_STATE_SUSPENDING)) {
50 return PSCI_E_INTERN_FAIL;
51 }
52
Filip Drazicd7d62ce2017-02-07 12:03:56 +010053 /* Clear power down request */
54 pm_client_wakeup(proc);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080055
56 /* Send request to PMU to wake up selected APU CPU core */
Soren Brinkmann17aea222016-05-19 07:20:14 -070057 pm_req_wakeup(proc->node_id, 1, zynqmp_sec_entry, REQ_ACK_BLOCKING);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080058
59 return PSCI_E_SUCCESS;
60}
61
Soren Brinkmann76fcae32016-03-06 20:16:27 -080062static void zynqmp_pwr_domain_off(const psci_power_state_t *target_state)
63{
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +053064 uint32_t cpu_id = plat_my_core_pos();
Soren Brinkmann76fcae32016-03-06 20:16:27 -080065 const struct pm_proc *proc = pm_get_proc(cpu_id);
66
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053067 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080068 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
69 __func__, i, target_state->pwr_domain_state[i]);
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +053070 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -080071
72 /* Prevent interrupts from spuriously waking up this cpu */
73 gicv2_cpuif_disable();
74
75 /*
76 * Send request to PMU to power down the appropriate APU CPU
77 * core.
78 * According to PSCI specification, CPU_off function does not
79 * have resume address and CPU core can only be woken up
80 * invoking CPU_on function, during which resume address will
81 * be set.
82 */
Filip Drazic0bd9d0c2016-07-20 17:17:39 +020083 pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080084}
85
Soren Brinkmann76fcae32016-03-06 20:16:27 -080086static void zynqmp_pwr_domain_suspend(const psci_power_state_t *target_state)
87{
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +053088 uint32_t state;
89 uint32_t cpu_id = plat_my_core_pos();
Soren Brinkmann76fcae32016-03-06 20:16:27 -080090 const struct pm_proc *proc = pm_get_proc(cpu_id);
91
92 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
93 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
94 __func__, i, target_state->pwr_domain_state[i]);
95
Filip Drazic0bd9d0c2016-07-20 17:17:39 +020096 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
97 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
98
Soren Brinkmann76fcae32016-03-06 20:16:27 -080099 /* Send request to PMU to suspend this core */
Filip Drazic0bd9d0c2016-07-20 17:17:39 +0200100 pm_self_suspend(proc->node_id, MAX_LATENCY, state, zynqmp_sec_entry);
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800101
102 /* APU is to be turned off */
103 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800104 /* disable coherency */
105 plat_arm_interconnect_exit_coherency();
106 }
107}
108
109static void zynqmp_pwr_domain_on_finish(const psci_power_state_t *target_state)
110{
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530111 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800112 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
113 __func__, i, target_state->pwr_domain_state[i]);
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530114 }
Siva Durga Prasad Paladugu60bfbc92018-09-24 22:51:49 -0700115 plat_arm_gic_pcpu_init();
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800116 gicv2_cpuif_enable();
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800117}
118
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800119static void zynqmp_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
120{
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +0530121 uint32_t cpu_id = plat_my_core_pos();
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800122 const struct pm_proc *proc = pm_get_proc(cpu_id);
123
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530124 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800125 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
126 __func__, i, target_state->pwr_domain_state[i]);
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530127 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800128
129 /* Clear the APU power control register for this cpu */
130 pm_client_wakeup(proc);
131
132 /* enable coherency */
133 plat_arm_interconnect_enter_coherency();
Soren Brinkmann3b6ebcb2016-02-18 21:16:35 -0800134 /* APU was turned off */
135 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
136 plat_arm_gic_init();
137 } else {
138 gicv2_cpuif_enable();
139 gicv2_pcpu_distif_init();
140 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800141}
142
143/*******************************************************************************
144 * ZynqMP handlers to shutdown/reboot the system
145 ******************************************************************************/
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800146
147static void __dead2 zynqmp_system_off(void)
148{
149 /* disable coherency */
150 plat_arm_interconnect_exit_coherency();
151
152 /* Send the power down request to the PMU */
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700153 pm_system_shutdown(PMF_SHUTDOWN_TYPE_SHUTDOWN,
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530154 pm_get_shutdown_scope());
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800155
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530156 while (1) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800157 wfi();
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530158 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800159}
160
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800161static void __dead2 zynqmp_system_reset(void)
162{
163 /* disable coherency */
164 plat_arm_interconnect_exit_coherency();
165
166 /* Send the system reset request to the PMU */
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700167 pm_system_shutdown(PMF_SHUTDOWN_TYPE_RESET,
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530168 pm_get_shutdown_scope());
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800169
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530170 while (1) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800171 wfi();
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530172 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800173}
174
Venkatesh Yadav Abbarapue7c45382022-05-19 14:49:49 +0530175static int32_t zynqmp_validate_power_state(uint32_t power_state,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800176 psci_power_state_t *req_state)
177{
178 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
179
Venkatesh Yadav Abbarapua2ca35d2022-07-04 11:40:27 +0530180 uint32_t pstate = psci_get_pstate_type(power_state);
Stefan Krsmanovic3779c5c2016-05-09 18:00:47 +0200181
182 assert(req_state);
183
184 /* Sanity check the requested state */
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530185 if (pstate == PSTATE_TYPE_STANDBY) {
Stefan Krsmanovic3779c5c2016-05-09 18:00:47 +0200186 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530187 } else {
Stefan Krsmanovic3779c5c2016-05-09 18:00:47 +0200188 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530189 }
Stefan Krsmanovic3779c5c2016-05-09 18:00:47 +0200190 /* We expect the 'state id' to be zero */
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530191 if (psci_get_pstate_id(power_state)) {
Stefan Krsmanovic3779c5c2016-05-09 18:00:47 +0200192 return PSCI_E_INVALID_PARAMS;
Venkatesh Yadav Abbarapu987fad32022-04-29 13:52:00 +0530193 }
Stefan Krsmanovic3779c5c2016-05-09 18:00:47 +0200194
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800195 return PSCI_E_SUCCESS;
196}
197
Venkatesh Yadav Abbarapuc9505352022-05-16 17:29:04 +0530198static void zynqmp_get_sys_suspend_power_state(psci_power_state_t *req_state)
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800199{
200 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE;
201 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE;
202}
203
204/*******************************************************************************
205 * Export the platform handlers to enable psci to invoke them
206 ******************************************************************************/
207static const struct plat_psci_ops zynqmp_psci_ops = {
208 .cpu_standby = zynqmp_cpu_standby,
209 .pwr_domain_on = zynqmp_pwr_domain_on,
210 .pwr_domain_off = zynqmp_pwr_domain_off,
211 .pwr_domain_suspend = zynqmp_pwr_domain_suspend,
212 .pwr_domain_on_finish = zynqmp_pwr_domain_on_finish,
213 .pwr_domain_suspend_finish = zynqmp_pwr_domain_suspend_finish,
214 .system_off = zynqmp_system_off,
215 .system_reset = zynqmp_system_reset,
216 .validate_power_state = zynqmp_validate_power_state,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800217 .get_sys_suspend_power_state = zynqmp_get_sys_suspend_power_state,
218};
219
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800220/*******************************************************************************
221 * Export the platform specific power ops.
222 ******************************************************************************/
223int plat_setup_psci_ops(uintptr_t sec_entrypoint,
224 const struct plat_psci_ops **psci_ops)
225{
226 zynqmp_sec_entry = sec_entrypoint;
227
Siva Durga Prasad Paladugu40808bc2018-04-30 19:43:03 +0530228 *psci_ops = &zynqmp_psci_ops;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800229
230 return 0;
231}