| Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <arch.h> |
| 32 | #include <asm_macros.S> |
| 33 | #include "../juno_def.h" |
| 34 | |
| 35 | .globl platform_get_entrypoint |
| 36 | .globl platform_cold_boot_init |
| 37 | .globl plat_secondary_cold_boot_setup |
| 38 | |
| 39 | |
| 40 | /* ----------------------------------------------------- |
| 41 | * void plat_secondary_cold_boot_setup (void); |
| 42 | * |
| 43 | * This function performs any platform specific actions |
| 44 | * needed for a secondary cpu after a cold reset e.g |
| 45 | * mark the cpu's presence, mechanism to place it in a |
| 46 | * holding pen etc. |
| 47 | * ----------------------------------------------------- |
| 48 | */ |
| 49 | func plat_secondary_cold_boot_setup |
| 50 | /* Juno todo: Implement secondary CPU cold boot setup on Juno */ |
| 51 | cb_panic: |
| 52 | b cb_panic |
| 53 | |
| 54 | |
| 55 | /* ----------------------------------------------------- |
| 56 | * void platform_get_entrypoint (unsigned int mpid); |
| 57 | * |
| 58 | * Main job of this routine is to distinguish between |
| 59 | * a cold and warm boot. |
| 60 | * On a cold boot the secondaries first wait for the |
| 61 | * platform to be initialized after which they are |
| 62 | * hotplugged in. The primary proceeds to perform the |
| 63 | * platform initialization. |
| 64 | * On a warm boot, each cpu jumps to the address in its |
| 65 | * mailbox. |
| 66 | * |
| 67 | * TODO: Not a good idea to save lr in a temp reg |
| 68 | * ----------------------------------------------------- |
| 69 | */ |
| 70 | func platform_get_entrypoint |
| 71 | mov x9, x30 // lr |
| 72 | bl platform_get_core_pos |
| 73 | ldr x1, =TRUSTED_MAILBOXES_BASE |
| 74 | lsl x0, x0, #TRUSTED_MAILBOX_SHIFT |
| 75 | ldr x0, [x1, x0] |
| 76 | ret x9 |
| 77 | |
| 78 | |
| 79 | /* ----------------------------------------------------- |
| 80 | * void platform_cold_boot_init (bl1_main function); |
| 81 | * |
| 82 | * Routine called only by the primary cpu after a cold |
| 83 | * boot to perform early platform initialization |
| 84 | * ----------------------------------------------------- |
| 85 | */ |
| 86 | func platform_cold_boot_init |
| 87 | mov x20, x0 |
| 88 | |
| 89 | /* --------------------------------------------- |
| 90 | * Give ourselves a small coherent stack to |
| 91 | * ease the pain of initializing the MMU and |
| 92 | * CCI in assembler |
| 93 | * --------------------------------------------- |
| 94 | */ |
| 95 | mrs x0, mpidr_el1 |
| 96 | bl platform_set_coherent_stack |
| 97 | |
| 98 | /* --------------------------------------------- |
| 99 | * Architectural init. can be generic e.g. |
| 100 | * enabling stack alignment and platform spec- |
| 101 | * ific e.g. MMU & page table setup as per the |
| 102 | * platform memory map. Perform the latter here |
| 103 | * and the former in bl1_main. |
| 104 | * --------------------------------------------- |
| 105 | */ |
| 106 | bl bl1_early_platform_setup |
| 107 | bl bl1_plat_arch_setup |
| 108 | |
| 109 | /* --------------------------------------------- |
| 110 | * Give ourselves a stack allocated in Normal |
| 111 | * -IS-WBWA memory |
| 112 | * --------------------------------------------- |
| 113 | */ |
| 114 | mrs x0, mpidr_el1 |
| 115 | bl platform_set_stack |
| 116 | |
| 117 | /* --------------------------------------------- |
| 118 | * Jump to the main function. Returning from it |
| 119 | * is a terminal error. |
| 120 | * --------------------------------------------- |
| 121 | */ |
| 122 | blr x20 |
| 123 | |
| 124 | cb_init_panic: |
| 125 | b cb_init_panic |