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developer65014b82015-04-13 14:47:57 +08001/*
2 * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <cci.h>
32#include <gic_v2.h>
33#include <mt8173_def.h>
34
35.section .rodata.gic_reg_name, "aS"
36gicc_regs:
37 .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
38gicd_pend_reg:
39 .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \
40 " Offset:\t\t\tvalue\n"
41newline:
42 .asciz "\n"
43spacer:
44 .asciz ":\t\t0x"
45
Gerald Lejeune2c7ed5b2015-11-26 15:47:53 +010046.section .rodata.cci_reg_name, "aS"
47cci_iface_regs:
48 .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
49
developer65014b82015-04-13 14:47:57 +080050 /* ---------------------------------------------
Gerald Lejeune2c7ed5b2015-11-26 15:47:53 +010051 * The below macro prints out relevant GIC and
52 * CCI registers whenever an unhandled exception
53 * is taken in BL3-1.
developer65014b82015-04-13 14:47:57 +080054 * Clobbers: x0 - x10, x16, x17, sp
55 * ---------------------------------------------
56 */
Gerald Lejeune2c7ed5b2015-11-26 15:47:53 +010057 .macro plat_crash_print_regs
developer65014b82015-04-13 14:47:57 +080058 mov_imm x16, BASE_GICD_BASE
59 mov_imm x17, BASE_GICC_BASE
60 /* Load the gicc reg list to x6 */
61 adr x6, gicc_regs
62 /* Load the gicc regs to gp regs used by str_in_crash_buf_print */
63 ldr w8, [x17, #GICC_HPPIR]
64 ldr w9, [x17, #GICC_AHPPIR]
65 ldr w10, [x17, #GICC_CTLR]
66 /* Store to the crash buf and print to console */
67 bl str_in_crash_buf_print
68
69 /* Print the GICD_ISPENDR regs */
70 add x7, x16, #GICD_ISPENDR
71 adr x4, gicd_pend_reg
72 bl asm_print_str
73gicd_ispendr_loop:
74 sub x4, x7, x16
75 cmp x4, #0x280
76 b.eq exit_print_gic_regs
77 bl asm_print_hex
78
79 adr x4, spacer
80 bl asm_print_str
81
82 ldr x4, [x7], #8
83 bl asm_print_hex
84
85 adr x4, newline
86 bl asm_print_str
87 b gicd_ispendr_loop
88exit_print_gic_regs:
developer65014b82015-04-13 14:47:57 +080089
developer65014b82015-04-13 14:47:57 +080090 adr x6, cci_iface_regs
91 /* Store in x7 the base address of the first interface */
92 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
93 PLAT_MT_CCI_CLUSTER0_SL_IFACE_IX))
94 ldr w8, [x7, #SNOOP_CTRL_REG]
95 /* Store in x7 the base address of the second interface */
96 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
97 PLAT_MT_CCI_CLUSTER1_SL_IFACE_IX))
98 ldr w9, [x7, #SNOOP_CTRL_REG]
99 /* Store to the crash buf and print to console */
100 bl str_in_crash_buf_print
101 .endm