blob: 25359f91aa4ce55e735848859a17efec41da0c0f [file] [log] [blame]
Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
Roberto Vargas344ff022018-10-19 16:44:18 +01002 * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08005 */
6
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00007#include <common/bl_common.h>
8#include <common/debug.h>
9#include <drivers/console.h>
10
Soren Brinkmann76fcae32016-03-06 20:16:27 -080011#include <plat_arm.h>
Isla Mitchelle3631462017-07-14 10:46:32 +010012#include <platform_tsp.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000013
Soren Brinkmann76fcae32016-03-06 20:16:27 -080014#include "../zynqmp_private.h"
15
Soren Brinkmann76fcae32016-03-06 20:16:27 -080016#define BL32_END (unsigned long)(&__BL32_END__)
17
Soren Brinkmann76fcae32016-03-06 20:16:27 -080018/*******************************************************************************
19 * Initialize the UART
20 ******************************************************************************/
21void tsp_early_platform_setup(void)
22{
23 /*
24 * Initialize a different console than already in use to display
25 * messages from TSP
26 */
Soren Brinkmann99c0d7b2016-06-10 09:57:14 -070027 console_init(ZYNQMP_UART_BASE, zynqmp_get_uart_clk(),
Soren Brinkmann76fcae32016-03-06 20:16:27 -080028 ZYNQMP_UART_BAUDRATE);
29
30 /* Initialize the platform config for future decision making */
31 zynqmp_config_setup();
32}
33
34/*******************************************************************************
35 * Perform platform specific setup placeholder
36 ******************************************************************************/
37void tsp_platform_setup(void)
38{
39 plat_arm_gic_driver_init();
40 plat_arm_gic_init();
41}
42
43/*******************************************************************************
44 * Perform the very early platform specific architectural setup here. At the
45 * moment this is only intializes the MMU
46 ******************************************************************************/
47void tsp_plat_arch_setup(void)
48{
Daniel Boulby45a2c9e2018-07-06 16:54:44 +010049 const mmap_region_t bl_regions[] = {
50 MAP_REGION_FLAT(BL32_BASE, BL32_END - BL32_BASE,
51 MT_MEMORY | MT_RW | MT_SECURE),
52 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
53 MT_CODE | MT_SECURE),
54 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE,
55 MT_RO_DATA | MT_SECURE),
56 MAP_REGION_FLAT(BL_COHERENT_RAM_BASE,
57 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
58 MT_DEVICE | MT_RW | MT_SECURE),
59 {0}
60 };
61
Roberto Vargas344ff022018-10-19 16:44:18 +010062 setup_page_tables(bl_regions, plat_arm_get_mmap());
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +010063 enable_mmu_el1(0);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080064}