diff --git a/lib/cpus/aarch64/cortex_a78c.S b/lib/cpus/aarch64/cortex_a78c.S
index 4f0bb49..49cebfe 100644
--- a/lib/cpus/aarch64/cortex_a78c.S
+++ b/lib/cpus/aarch64/cortex_a78c.S
@@ -18,6 +18,35 @@
 #endif
 
 /* --------------------------------------------------
+ * Errata Workaround for Cortex A78C Erratum 2376749.
+ * This applies to revision r0p1 and r0p2 of the A78C
+ * and is currently open. It is a Cat B erratum.
+ * Inputs:
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0-x4, x17
+ * --------------------------------------------------
+ */
+func errata_a78c_2376749_wa
+	/* Check revision */
+	mov	x17, x30
+	bl	check_errata_2376749
+	cbz	x0, 1f
+	/* Set CPUACTLR2_EL1[0] to 1. */
+	mrs	x1, CORTEX_A78C_CPUACTLR2_EL1
+	orr	x1, x1, #CORTEX_A78C_CPUACTLR2_EL1_BIT_0
+	msr	CORTEX_A78C_CPUACTLR2_EL1, x1
+1:
+	ret	x17
+endfunc errata_a78c_2376749_wa
+
+func check_errata_2376749
+	/* Applies to r0p1 and r0p2*/
+	mov	x1, #0x01
+	mov	x2, #0x02
+	b	cpu_rev_var_range
+endfunc check_errata_2376749
+
+/* --------------------------------------------------
  * Errata Workaround for Cortex A78C Erratum 2395411.
  * This applies to revision r0p1 and r0p2 of the A78C
  * and is currently open. It is a Cat B erratum.
@@ -151,6 +180,11 @@
 	bl	errata_a78c_2242638_wa
 #endif
 
+#if ERRATA_A78C_2376749
+	mov	x0, x18
+	bl	errata_a78c_2376749_wa
+#endif
+
 #if ERRATA_A78C_2395411
 	mov 	x0, x18
 	bl	errata_a78c_2395411_wa
@@ -201,6 +235,7 @@
 	 */
 	report_errata ERRATA_A78C_2132064, cortex_a78c, 2132064
 	report_errata ERRATA_A78C_2242638, cortex_a78c, 2242638
+	report_errata ERRATA_A78C_2376749, cortex_a78c, 2376749
 	report_errata ERRATA_A78C_2395411, cortex_a78c, 2395411
 	report_errata WORKAROUND_CVE_2022_23960, cortex_a78c, cve_2022_23960