tree fc175959d5ef32673596eaaedfc8a6c96f59ab38
parent b0ac8017d75abf9e48a9c3b4e29f64508bd1b6dc
author Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> 1727262213 +0300
committer Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> 1728383926 +0300

feat(s32g274a): add ncore support

Ncore is a cache-coherent interconnect module. It enables the
integration of heterogenous coherent agents and non-coherent
agents in a chip. TF-A boots with the first core in isolation
to avoid crashes due to cache invalidation operations. Later,
it will disable the isolation and reconfigure the module every
time a new core is added or removed through PSCI.

Change-Id: Ida42db91b10be1e66c3b9b73674d1e37a61844dd
Signed-off-by: Dan Nica <dan.nica@nxp.com>
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>