tree 4a8cda1f248cfefb1c2bff43f39ff06ee216d7b1
parent a9a3a100b659044f8ae90cccb2ba11d7336b1ce5
author Varun Wadekar <vwadekar@nvidia.com> 1510181108 -0800
committer Varun Wadekar <vwadekar@nvidia.com> 1548268373 -0800

Tegra186: helper functions for CPU rst handler and SMMU ctx offset

This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.

Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>