| commit | fa0b4e83817bf5e596b37d52be79bf9db2a39424 | [log] [tgz] |
|---|---|---|
| author | Max Yu <maxlyu@google.com> | Thu Sep 08 23:21:21 2022 +0000 |
| committer | maxlyu <maxlyu@google.com> | Mon Sep 12 22:35:14 2022 +0200 |
| tree | fa1a73e5f219044738bab29f86fc3afeba749362 | |
| parent | 8181f28047c4f369067a24da75cefa9f8a0651d0 [diff] |
docs(porting-guide): correct typo of "bits" to "bytes" The CACHE_WRITEBACK_GRANULE is documented to be in bits, but specifying the value in bits broke a build. Further investigation suggests that the value should in fact be in bytes. See https://github.com/ARM-software/arm-trusted-firmware/blob/master/include/arch/aarch64/ smccc_helpers.h#L101 and https://gcc.gnu.org/onlinedocs/gcc-12.2.0/gcc/Common-Type-Attributes.html Change-Id: I9a2b2fbe18d5a58a8f9aeb2726a0623f3484c88e Signed-off-by: Max Yu <maxlyu@google.com>
diff --git a/docs/getting_started/porting-guide.rst b/docs/getting_started/porting-guide.rst index 77ee897..992aca1 100644 --- a/docs/getting_started/porting-guide.rst +++ b/docs/getting_started/porting-guide.rst
@@ -120,7 +120,7 @@ - **#define : CACHE_WRITEBACK_GRANULE** - Defines the size in bits of the largest cache line across all the cache + Defines the size in bytes of the largest cache line across all the cache levels in the platform. - **#define : FIRMWARE_WELCOME_STR**