rockchip/rk3399: Add watchdog support in pmusram
To catch early hangs in resume, this sets up the watchdog before
anything else in the pmusram code (ignoring setting up the stack...).
This uses hard coded settings for the watchdog until the proper
watchdog restore later on in the firmware/kernel.
This also restores the old watchdog register values before the PLLs
are restored to make sure we don't temporarily switch over to a 1/3s
timeout on the watchdog when the pclk_wdt goes from 4MHz to 100MHz.
Change-Id: I8f7652089a88783271b17482117b4609330abe80
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
diff --git a/plat/rockchip/rk3399/drivers/secure/secure.c b/plat/rockchip/rk3399/drivers/secure/secure.c
index 589d833..1937b13 100644
--- a/plat/rockchip/rk3399/drivers/secure/secure.c
+++ b/plat/rockchip/rk3399/drivers/secure/secure.c
@@ -77,7 +77,7 @@
BIT_WITH_WMSK(rgn));
}
-void secure_watchdog_disable(void)
+void secure_watchdog_gate(void)
{
/**
* Disable CA53 and CM0 wdt pclk
@@ -89,7 +89,7 @@
BIT_WITH_WMSK(PCLK_WDT_CM0_GATE_SHIFT));
}
-void secure_watchdog_enable(void)
+__pmusramfunc void secure_watchdog_ungate(void)
{
/**
* Enable CA53 and CM0 wdt pclk