feat(s32g274a): enable BL2 early clocks
s32cc_init_early_clks will be used to increase the frequency of the
clocks which have a performance impact on BL2 boot. This set includes
A53, XBAR, DDR and Linflex clocks. For now, it will only contain the
frequency set for FXOSC. More clock management will be added in the next
commits.
Change-Id: Ie85465884de02f5082185f91749f190f40249c2e
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
diff --git a/drivers/nxp/clk/s32cc/s32cc_clk.mk b/drivers/nxp/clk/s32cc/s32cc_clk.mk
index 3f704c6..f5279d3 100644
--- a/drivers/nxp/clk/s32cc/s32cc_clk.mk
+++ b/drivers/nxp/clk/s32cc/s32cc_clk.mk
@@ -11,6 +11,8 @@
${PLAT_DRIVERS_PATH}/clk/s32cc/s32cc_clk_drv.c \
${PLAT_DRIVERS_PATH}/clk/s32cc/s32cc_clk_modules.c \
${PLAT_DRIVERS_PATH}/clk/s32cc/s32cc_clk_utils.c \
+ ${PLAT_DRIVERS_PATH}/clk/s32cc/s32cc_early_clks.c \
+ drivers/clk/clk.c \
ifeq (${BL_COMM_CLK_NEEDED},yes)
BL2_SOURCES += ${CLK_SOURCES}
diff --git a/drivers/nxp/clk/s32cc/s32cc_early_clks.c b/drivers/nxp/clk/s32cc/s32cc_early_clks.c
new file mode 100644
index 0000000..fc1dc02
--- /dev/null
+++ b/drivers/nxp/clk/s32cc/s32cc_early_clks.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#include <drivers/clk.h>
+#include <s32cc-clk-drv.h>
+#include <s32cc-clk-ids.h>
+#include <s32cc-clk-utils.h>
+
+#define S32CC_FXOSC_FREQ (40U * MHZ)
+
+int s32cc_init_early_clks(void)
+{
+ int ret;
+
+ s32cc_clk_register_drv();
+
+ ret = clk_set_rate(S32CC_CLK_FXOSC, S32CC_FXOSC_FREQ, NULL);
+ if (ret != 0) {
+ return ret;
+ }
+
+ return ret;
+}
diff --git a/include/drivers/nxp/clk/s32cc/s32cc-clk-drv.h b/include/drivers/nxp/clk/s32cc/s32cc-clk-drv.h
new file mode 100644
index 0000000..d879f5b
--- /dev/null
+++ b/include/drivers/nxp/clk/s32cc/s32cc-clk-drv.h
@@ -0,0 +1,11 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef S32CC_CLK_DRV_H
+#define S32CC_CLK_DRV_H
+
+int s32cc_init_early_clks(void);
+
+#endif
diff --git a/include/drivers/nxp/clk/s32cc/s32cc-clk-utils.h b/include/drivers/nxp/clk/s32cc/s32cc-clk-utils.h
index aaf6c5f..6a90406 100644
--- a/include/drivers/nxp/clk/s32cc/s32cc-clk-utils.h
+++ b/include/drivers/nxp/clk/s32cc/s32cc-clk-utils.h
@@ -13,4 +13,6 @@
struct s32cc_clk *s32cc_get_arch_clk(unsigned long id);
+void s32cc_clk_register_drv(void);
+
#endif /* S32CC_CLK_UTILS_H */
diff --git a/plat/nxp/s32/s32g274ardb2/plat_bl2_el3_setup.c b/plat/nxp/s32/s32g274ardb2/plat_bl2_el3_setup.c
index f265d95..705832c 100644
--- a/plat/nxp/s32/s32g274ardb2/plat_bl2_el3_setup.c
+++ b/plat/nxp/s32/s32g274ardb2/plat_bl2_el3_setup.c
@@ -4,10 +4,12 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <common/debug.h>
#include <common/desc_image_load.h>
#include <lib/mmio.h>
#include <plat/common/platform.h>
#include <plat_console.h>
+#include <s32cc-clk-drv.h>
#include <plat_io_storage.h>
#define SIUL2_PC09_MSCR UL(0x4009C2E4)
@@ -50,6 +52,13 @@
void bl2_el3_early_platform_setup(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
+ int ret;
+
+ ret = s32cc_init_early_clks();
+ if (ret != 0) {
+ panic();
+ }
+
linflex_config_pinctrl();
console_s32g2_register();