Merge "fix(cpus): workaround for Cortex-A715 erratum 2728106" into integration
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 5733214..f1553b2 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -916,6 +916,10 @@
Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
It is fixed in r1p1.
+- ``ERRATA_A715_2728106``: This applies errata 2728106 workaround to
+ Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0
+ and r1p1. It is fixed in r1p2.
+
For Cortex-A720, the following errata build flags are defined :
- ``ERRATA_A720_2926083``: This applies errata 2926083 workaround to
diff --git a/lib/cpus/aarch64/cortex_a715.S b/lib/cpus/aarch64/cortex_a715.S
index a5be22d..16be161 100644
--- a/lib/cpus/aarch64/cortex_a715.S
+++ b/lib/cpus/aarch64/cortex_a715.S
@@ -94,6 +94,27 @@
check_erratum_range cortex_a715, ERRATUM(2561034), CPU_REV(1, 0), CPU_REV(1, 0)
+workaround_reset_start cortex_a715, ERRATUM(2728106), ERRATA_A715_2728106
+ mov x0, #3
+ msr CORTEX_A715_CPUPSELR_EL3, x0
+ isb
+ ldr x0, =0xd503339f
+ msr CORTEX_A715_CPUPOR_EL3, x0
+ ldr x0, =0xfffff3ff
+ msr CORTEX_A715_CPUPMR_EL3, x0
+ mov x0, #1
+ orr x0, x0, #(3<<4)
+ orr x0, x0, #(0xf<<6)
+ orr x0, x0, #(1<<13)
+ orr x0, x0, #(1<<20)
+ orr x0, x0, #(1<<22)
+ orr x0, x0, #(1<<31)
+ orr x0, x0, #(1<<50)
+ msr CORTEX_A715_CPUPCR_EL3, x0
+workaround_reset_end cortex_a715, ERRATUM(2728106)
+
+check_erratum_ls cortex_a715, ERRATUM(2728106), CPU_REV(1, 1)
+
workaround_reset_start cortex_a715, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
#if IMAGE_BL31
/*
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 872f6c7..b28d90d 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -940,6 +940,10 @@
# only to revision r1p0. It is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A715_2561034
+# Flag to apply erratum 2728106 workaround during reset. This erratum applies
+# only to revision r0p0, r1p0 and r1p1. It is fixed in r1p2.
+CPU_FLAG_LIST += ERRATA_A715_2728106
+
# Flag to apply erratum 2926083 workaround during reset. This erratum applies
# to revisions r0p0 and r0p1. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_A720_2926083