stm32mp1: use a common function to check spinlock is available
To use spinlocks, MMU should be enabled, as well as data cache.
A common function is created (moved from clock file).
It is then used whenever a spinlock has to be taken, in BSEC and clock
drivers.
Change-Id: I94baed0114a2061ad71bd5287a91bf7f1c6821f6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
diff --git a/drivers/st/bsec/bsec.c b/drivers/st/bsec/bsec.c
index aaecf1f..b3c15ee 100644
--- a/drivers/st/bsec/bsec.c
+++ b/drivers/st/bsec/bsec.c
@@ -32,20 +32,14 @@
static void bsec_lock(void)
{
- const uint32_t mask = SCTLR_M_BIT | SCTLR_C_BIT;
-
- /* Lock is currently required only when MMU and cache are enabled */
- if ((read_sctlr() & mask) == mask) {
+ if (stm32mp_lock_available()) {
spin_lock(&bsec_spinlock);
}
}
static void bsec_unlock(void)
{
- const uint32_t mask = SCTLR_M_BIT | SCTLR_C_BIT;
-
- /* Unlock is required only when MMU and cache are enabled */
- if ((read_sctlr() & mask) == mask) {
+ if (stm32mp_lock_available()) {
spin_unlock(&bsec_spinlock);
}
}
diff --git a/drivers/st/clk/stm32mp1_clk.c b/drivers/st/clk/stm32mp1_clk.c
index f3b9f0c..0cc87cc 100644
--- a/drivers/st/clk/stm32mp1_clk.c
+++ b/drivers/st/clk/stm32mp1_clk.c
@@ -541,29 +541,19 @@
return &stm32mp1_clk_pll[idx];
}
-static int stm32mp1_lock_available(void)
-{
- /* The spinlocks are used only when MMU is enabled */
- return (read_sctlr() & SCTLR_M_BIT) && (read_sctlr() & SCTLR_C_BIT);
-}
-
static void stm32mp1_clk_lock(struct spinlock *lock)
{
- if (stm32mp1_lock_available() == 0U) {
- return;
+ if (stm32mp_lock_available()) {
+ /* Assume interrupts are masked */
+ spin_lock(lock);
}
-
- /* Assume interrupts are masked */
- spin_lock(lock);
}
static void stm32mp1_clk_unlock(struct spinlock *lock)
{
- if (stm32mp1_lock_available() == 0U) {
- return;
+ if (stm32mp_lock_available()) {
+ spin_unlock(lock);
}
-
- spin_unlock(lock);
}
bool stm32mp1_rcc_is_secure(void)
diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h
index 0d0a9c6..3dd6c56 100644
--- a/plat/st/common/include/stm32mp_common.h
+++ b/plat/st/common/include/stm32mp_common.h
@@ -30,6 +30,9 @@
/* Return the base address of the RCC peripheral */
uintptr_t stm32mp_rcc_base(void);
+/* Check MMU status to allow spinlock use */
+bool stm32mp_lock_available(void);
+
/* Get IWDG platform instance ID from peripheral IO memory base address */
uint32_t stm32_iwdg_get_instance(uintptr_t base);
diff --git a/plat/st/common/stm32mp_common.c b/plat/st/common/stm32mp_common.c
index f95c788..5428a74 100644
--- a/plat/st/common/stm32mp_common.c
+++ b/plat/st/common/stm32mp_common.c
@@ -87,6 +87,14 @@
return rcc_base;
}
+bool stm32mp_lock_available(void)
+{
+ const uint32_t c_m_bits = SCTLR_M_BIT | SCTLR_C_BIT;
+
+ /* The spinlocks are used only when MMU and data cache are enabled */
+ return (read_sctlr() & c_m_bits) == c_m_bits;
+}
+
uintptr_t stm32_get_gpio_bank_base(unsigned int bank)
{
if (bank == GPIO_BANK_Z) {