tree 03985137ba469cdc82215b015757195f0588c105
parent 0dde32b11cd83d0ecabdd4e5e7a46a4210747b9e
author Mustafa Yigit Bilgen <mbilgen@nvidia.com> 1472869822 -0700
committer Varun Wadekar <vwadekar@nvidia.com> 1491426591 -0700

Tegra186: clean CPU wake times from L2 cache

When entering C7, ATF disables caches and flushes the L1 cache. However,
wake_time[cpu] can still remain in the L2 cache, causing later reads to it
to fetch from DRAM. This will read stale values.

Fix this by aligning wake_time[cpu] to cache lines, and explicitly cleaning it
before disabling caches.

Change-Id: Id73d095b479677595a6b3dd0abb240a1fef5f311
Signed-off-by: Mustafa Yigit Bilgen <mbilgen@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>