Configure all secure interrupts on ARM platforms
ARM TF configures all interrupts as non-secure except those which
are present in irq_sec_array. This patch updates the irq_sec_array
with the missing secure interrupts for ARM platforms.
It also updates the documentation to be inline with the latest
implementation.
Fixes ARM-software/tf-issues#312
Change-Id: I39956c56a319086e3929d1fa89030b4ec4b01fcc
diff --git a/plat/arm/board/juno/include/platform_def.h b/plat/arm/board/juno/include/platform_def.h
index d2122ad..ba93254 100644
--- a/plat/arm/board/juno/include/platform_def.h
+++ b/plat/arm/board/juno/include/platform_def.h
@@ -96,12 +96,19 @@
#define PLAT_CSS_GICH_BASE 0x2c04f000
#define PLAT_CSS_GICV_BASE 0x2c06f000
-#define PLAT_CSS_IRQ_SEC_LIST CSS_IRQ_MHU, \
- CSS_IRQ_GPU_SMMU_0, \
- CSS_IRQ_GPU_SMMU_1, \
- CSS_IRQ_ETR_SMMU, \
- CSS_IRQ_TZC, \
- CSS_IRQ_TZ_WDOG
+#define PLAT_CSS_IRQ_SEC_LIST CSS_IRQ_MHU, \
+ CSS_IRQ_GPU_SMMU_0, \
+ CSS_IRQ_TZC, \
+ CSS_IRQ_TZ_WDOG, \
+ CSS_IRQ_SEC_SYS_TIMER, \
+ JUNO_IRQ_DMA_SMMU, \
+ JUNO_IRQ_HDLCD0_SMMU, \
+ JUNO_IRQ_HDLCD1_SMMU, \
+ JUNO_IRQ_USB_SMMU, \
+ JUNO_IRQ_THIN_LINKS_SMMU, \
+ JUNO_IRQ_SEC_I2C, \
+ JUNO_IRQ_GPU_SMMU_1, \
+ JUNO_IRQ_ETR_SMMU
/*
* Required ARM CSS SoC based platform porting definitions