diff --git a/plat/allwinner/sun50i_a64/sunxi_power.c b/plat/allwinner/sun50i_a64/sunxi_power.c
index 13a6a9b..b0d0427 100644
--- a/plat/allwinner/sun50i_a64/sunxi_power.c
+++ b/plat/allwinner/sun50i_a64/sunxi_power.c
@@ -232,7 +232,7 @@
 	/* locate the PMIC DT node, bail out if not found */
 	node = fdt_node_offset_by_compatible(fdt, -1, "x-powers,axp803");
 	if (node < 0) {
-		WARN("BL31: PMIC: Cannot find AXP803 DT node, skipping initial setup.\n");
+		WARN("PMIC: No PMIC DT node, skipping setup\n");
 		return;
 	}
 
@@ -245,7 +245,7 @@
 	/* descend into the "regulators" subnode */
 	node = fdt_subnode_offset(fdt, node, "regulators");
 	if (node < 0) {
-		WARN("BL31: PMIC: Cannot find regulators subnode, skipping initial setup.\n");
+		WARN("PMIC: No regulators DT node, skipping setup\n");
 		return;
 	}
 
@@ -275,6 +275,7 @@
 			continue;
 		}
 	}
+
 	/*
 	 * If DLDO2 is enabled after DC1SW, the PMIC overheats and shuts
 	 * down. So always enable DC1SW as the very last regulator.
@@ -291,11 +292,16 @@
 
 	switch (socid) {
 	case SUNXI_SOC_H5:
+		NOTICE("PMIC: Assuming H5 reference regulator design\n");
+
 		pmic = REF_DESIGN_H5;
-		NOTICE("BL31: PMIC: Defaulting to PortL GPIO according to H5 reference design.\n");
+
 		break;
 	case SUNXI_SOC_A64:
 		pmic = GENERIC_A64;
+
+		INFO("PMIC: Probing AXP803 on RSB\n");
+
 		ret = sunxi_init_platform_r_twi(socid, true);
 		if (ret)
 			return ret;
@@ -305,14 +311,12 @@
 			return ret;
 
 		pmic = AXP803_RSB;
-		NOTICE("BL31: PMIC: Detected AXP803 on RSB.\n");
 
 		if (fdt)
 			setup_axp803_rails(fdt);
 
 		break;
 	default:
-		NOTICE("BL31: PMIC: No support for Allwinner %x SoC.\n", socid);
 		return -ENODEV;
 	}
 	return 0;
diff --git a/plat/allwinner/sun50i_h6/sunxi_power.c b/plat/allwinner/sun50i_h6/sunxi_power.c
index 36e3dbe..08c74f8 100644
--- a/plat/allwinner/sun50i_h6/sunxi_power.c
+++ b/plat/allwinner/sun50i_h6/sunxi_power.c
@@ -31,15 +31,23 @@
 	int ret;
 
 	ret = i2c_write(chip, 0, 0, &reg, 1);
+	if (ret == 0)
+		ret = i2c_read(chip, 0, 0, val, 1);
 	if (ret)
-		return ret;
+		ERROR("PMIC: Cannot read AXP805 register %02x\n", reg);
 
-	return i2c_read(chip, 0, 0, val, 1);
+	return ret;
 }
 
 int axp_i2c_write(uint8_t chip, uint8_t reg, uint8_t val)
 {
-	return i2c_write(chip, reg, 1, &val, 1);
+	int ret;
+
+	ret = i2c_write(chip, reg, 1, &val, 1);
+	if (ret)
+		ERROR("PMIC: Cannot write AXP805 register %02x\n", reg);
+
+	return ret;
 }
 
 static int axp805_probe(void)
@@ -47,21 +55,18 @@
 	int ret;
 	uint8_t val;
 
+	/* Switch the AXP805 to master/single-PMIC mode. */
 	ret = axp_i2c_write(AXP805_ADDR, 0xff, 0x0);
-	if (ret) {
-		ERROR("PMIC: Cannot put AXP805 to master mode.\n");
-		return -EPERM;
-	}
+	if (ret)
+		return ret;
 
 	ret = axp_i2c_read(AXP805_ADDR, AXP805_ID, &val);
+	if (ret)
+		return ret;
 
-	if (!ret && ((val & 0xcf) == 0x40))
-		NOTICE("PMIC: AXP805 detected\n");
-	else if (ret) {
-		ERROR("PMIC: Cannot communicate with AXP805.\n");
-		return -EPERM;
-	} else {
-		ERROR("PMIC: Non-AXP805 chip attached at AXP805's address.\n");
+	val &= 0xcf;
+	if (val != 0x40) {
+		ERROR("PMIC: Found unknown PMIC %02x\n", val);
 		return -EINVAL;
 	}
 
@@ -72,12 +77,15 @@
 {
 	int ret;
 
-	sunxi_init_platform_r_twi(SUNXI_SOC_H6, false);
+	INFO("PMIC: Probing AXP805 on I2C\n");
+
+	ret = sunxi_init_platform_r_twi(SUNXI_SOC_H6, false);
+	if (ret)
+		return ret;
+
 	/* initialise mi2cv driver */
 	i2c_init((void *)SUNXI_R_I2C_BASE);
 
-	NOTICE("PMIC: Probing AXP805\n");
-
 	ret = axp805_probe();
 	if (ret)
 		return ret;