refactor(cpus): use cpu errata wrappers for aarch64 hunter based cpus
Adapt to use errata frame-work cpu macro helpers for following cpus:
- cortex-a520
- cortex-a720
- cortex-x4
- cortex-chaberton
- cortex-blackhawk
- Use sysreg_bit_set helper macro for enabling of any system register
bit field.
- Use errata_report_shim macro for reporting errata.
- Use cpu_reset_func_start/end helpers for adding cpu reset functions.
Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building with erratas and stepping through from ArmDS and running tftf.
Change-Id: I954fb603aa3746e02f2288656b98148d9cfd7843
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
diff --git a/lib/cpus/aarch64/cortex_blackhawk.S b/lib/cpus/aarch64/cortex_blackhawk.S
index 8dac4e9..b7b7a2d 100644
--- a/lib/cpus/aarch64/cortex_blackhawk.S
+++ b/lib/cpus/aarch64/cortex_blackhawk.S
@@ -21,12 +21,10 @@
#error "Cortex blackhawk supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
#endif
-func cortex_blackhawk_reset_func
+cpu_reset_func_start cortex_blackhawk
/* Disable speculative loads */
msr SSBS, xzr
- isb
- ret
-endfunc cortex_blackhawk_reset_func
+cpu_reset_func_end cortex_blackhawk
/* ----------------------------------------------------
* HW will do the cache maintenance while powering down
@@ -37,21 +35,12 @@
* Enable CPU power down bit in power control register
* ---------------------------------------------------
*/
- mrs x0, CORTEX_BLACKHAWK_CPUPWRCTLR_EL1
- orr x0, x0, #CORTEX_BLACKHAWK_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
- msr CORTEX_BLACKHAWK_CPUPWRCTLR_EL1, x0
+ sysreg_bit_set CORTEX_BLACKHAWK_CPUPWRCTLR_EL1, CORTEX_BLACKHAWK_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
isb
ret
endfunc cortex_blackhawk_core_pwr_dwn
-#if REPORT_ERRATA
-/*
- * Errata printing function for Cortex Blackhawk. Must follow AAPCS.
- */
-func cortex_blackhawk_errata_report
- ret
-endfunc cortex_blackhawk_errata_report
-#endif
+errata_report_shim cortex_blackhawk
/* ---------------------------------------------
* This function provides Cortex Blackhawk specific