Add myself and Andre Przywara as code owners for the Arm FPGA platform port
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I6d3949a971fada5a086b788dbe274f8451fcfc0d
diff --git a/docs/about/maintainers.rst b/docs/about/maintainers.rst
index bf29186..ea9a4f5 100644
--- a/docs/about/maintainers.rst
+++ b/docs/about/maintainers.rst
@@ -320,6 +320,14 @@
:F: docs/plat/meson-axg.rst
:F: plat/amlogic/axg/
+Arm FPGA platform port
+^^^^^^^^^^^^^^^^^^^^^^
+:M: Andre Przywara <andre.przywara@arm.com>
+:G: `Andre-ARM`_
+:M: Javier Almansa Sobrino <Javier.AlmansaSobrino@arm.com>
+:G: `javieralso-arm`_
+:F: plat/arm/board/arm_fpga
+
Arm System Guidance for Infrastructure / Mobile FVP platforms
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
:M: Nariman Poushin <nariman.poushin@linaro.org>