feat(gic600ae_fmu): enable all GICD, PPI, ITS SMs

The following SMIDs are disabled by default.

* GICD: MBIST REQ error and GICD FMU ClkGate override
* PPI: MBIST REQ error and PPI FMU ClkGate override
* ITS: MBIST REQ error and ITS FMU ClkGate override

This patch explicitly enables them during the FMU init sequence.

Change-Id: I573e64786e3318d4cbcd07d0a1caf25f8e6e9200
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
diff --git a/drivers/arm/gic/v3/gic600ae_fmu.c b/drivers/arm/gic/v3/gic600ae_fmu.c
index efca08f..0262f48 100644
--- a/drivers/arm/gic/v3/gic600ae_fmu.c
+++ b/drivers/arm/gic/v3/gic600ae_fmu.c
@@ -302,22 +302,26 @@
 	 */
 	if ((blk_present_mask & BIT(FMU_BLK_GICD)) != 0U) {
 		smen = (GICD_MBIST_REQ_ERROR << FMU_SMEN_SMID_SHIFT) |
-			(FMU_BLK_GICD << FMU_SMEN_BLK_SHIFT);
+			(FMU_BLK_GICD << FMU_SMEN_BLK_SHIFT) |
+			FMU_SMEN_EN_BIT;
 		gic_fmu_write_smen(base, smen);
 
 		smen = (GICD_FMU_CLKGATE_ERROR << FMU_SMEN_SMID_SHIFT) |
-			(FMU_BLK_GICD << FMU_SMEN_BLK_SHIFT);
+			(FMU_BLK_GICD << FMU_SMEN_BLK_SHIFT) |
+			FMU_SMEN_EN_BIT;
 		gic_fmu_write_smen(base, smen);
 	}
 
 	for (unsigned int i = FMU_BLK_PPI0; i < FMU_BLK_PPI31; i++) {
 		if ((blk_present_mask & BIT(i)) != 0U) {
 			smen = (PPI_MBIST_REQ_ERROR << FMU_SMEN_SMID_SHIFT) |
-				(i << FMU_SMEN_BLK_SHIFT);
+				(i << FMU_SMEN_BLK_SHIFT) |
+				FMU_SMEN_EN_BIT;
 			gic_fmu_write_smen(base, smen);
 
 			smen = (PPI_FMU_CLKGATE_ERROR << FMU_SMEN_SMID_SHIFT) |
-				(i << FMU_SMEN_BLK_SHIFT);
+				(i << FMU_SMEN_BLK_SHIFT) |
+				FMU_SMEN_EN_BIT;
 			gic_fmu_write_smen(base, smen);
 		}
 	}
@@ -325,11 +329,13 @@
 	for (unsigned int i = FMU_BLK_ITS0; i < FMU_BLK_ITS7; i++) {
 		if ((blk_present_mask & BIT(i)) != 0U) {
 			smen = (ITS_MBIST_REQ_ERROR << FMU_SMEN_SMID_SHIFT) |
-				(i << FMU_SMEN_BLK_SHIFT);
+				(i << FMU_SMEN_BLK_SHIFT) |
+				FMU_SMEN_EN_BIT;
 			gic_fmu_write_smen(base, smen);
 
 			smen = (ITS_FMU_CLKGATE_ERROR << FMU_SMEN_SMID_SHIFT) |
-				(i << FMU_SMEN_BLK_SHIFT);
+				(i << FMU_SMEN_BLK_SHIFT) |
+				FMU_SMEN_EN_BIT;
 			gic_fmu_write_smen(base, smen);
 		}
 	}
diff --git a/include/drivers/arm/gic600ae_fmu.h b/include/drivers/arm/gic600ae_fmu.h
index 904a5f9..88b87b9 100644
--- a/include/drivers/arm/gic600ae_fmu.h
+++ b/include/drivers/arm/gic600ae_fmu.h
@@ -37,6 +37,7 @@
 /* SMEN constants */
 #define FMU_SMEN_BLK_SHIFT	U(8)
 #define FMU_SMEN_SMID_SHIFT	U(24)
+#define FMU_SMEN_EN_BIT		BIT(0)
 
 /* Error record IDs */
 #define FMU_BLK_GICD		U(0)