rcar_gen3: plat: Add R-Car V3M support
Add R-Car V3M support. This is based on the original
V3M support patch for Yocto v2.23.1 by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---
Marek: Update on top of mainline ATF/master
diff --git a/drivers/renesas/rcar/board/board.c b/drivers/renesas/rcar/board/board.c
index 8c4eec2..1e83306 100644
--- a/drivers/renesas/rcar/board/board.c
+++ b/drivers/renesas/rcar/board/board.c
@@ -18,6 +18,8 @@
#define BOARD_DEFAULT (BOARD_DRAAK << BOARD_CODE_SHIFT)
#elif (RCAR_LSI == RCAR_E3)
#define BOARD_DEFAULT (BOARD_EBISU << BOARD_CODE_SHIFT)
+#elif (RCAR_LSI == RCAR_V3M)
+#define BOARD_DEFAULT (BOARD_EAGLE << BOARD_CODE_SHIFT)
#else
#define BOARD_DEFAULT (BOARD_SALVATOR_X << BOARD_CODE_SHIFT)
#endif
@@ -35,6 +37,7 @@
#define EB4_ID { 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
#define EB_ID { 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
#define DR_ID { 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
+#define EA_ID { 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
#define KK_ID { 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
const char *g_board_tbl[] = {
@@ -46,6 +49,7 @@
[BOARD_KRIEK] = "Kriek",
[BOARD_EBISU] = "Ebisu",
[BOARD_DRAAK] = "Draak",
+ [BOARD_EAGLE] = "Eagle",
[BOARD_UNKNOWN] = "unknown"
};
@@ -60,6 +64,7 @@
[BOARD_EBISU_4D] = EB4_ID,
[BOARD_EBISU] = EB_ID,
[BOARD_DRAAK] = DR_ID,
+ [BOARD_EAGLE] = EA_ID,
[BOARD_KRIEK] = KK_ID,
};
static uint8_t board_id = BOARD_ID_UNKNOWN;
diff --git a/drivers/renesas/rcar/board/board.h b/drivers/renesas/rcar/board/board.h
index 05c4e8a..51a8e30 100644
--- a/drivers/renesas/rcar/board/board.h
+++ b/drivers/renesas/rcar/board/board.h
@@ -16,7 +16,8 @@
#define BOARD_STARTER_KIT_PRE (0x0B)
#define BOARD_EBISU_4D (0x0DU)
#define BOARD_DRAAK (0x0EU)
-#define BOARD_UNKNOWN (BOARD_DRAAK + 1U)
+#define BOARD_EAGLE (0x0FU)
+#define BOARD_UNKNOWN (BOARD_EAGLE + 1U)
#define BOARD_REV_UNKNOWN (0xFF)
diff --git a/drivers/renesas/rcar/dma/dma_driver.c b/drivers/renesas/rcar/dma/dma_driver.c
index fef55c4..e0be46e 100644
--- a/drivers/renesas/rcar/dma/dma_driver.c
+++ b/drivers/renesas/rcar/dma/dma_driver.c
@@ -16,7 +16,11 @@
#include "rcar_private.h"
/* DMA CHANNEL setting (0/16/32) */
+#if RCAR_LSI == RCAR_V3M
+#define DMA_CH 16
+#else
#define DMA_CH 0
+#endif
#if (DMA_CH == 0)
#define SYS_DMAC_BIT ((uint32_t)1U << 19U)
diff --git a/drivers/renesas/rcar/rom/rom_api.c b/drivers/renesas/rcar/rom/rom_api.c
index 6f448a5..c9f8f5f 100644
--- a/drivers/renesas/rcar/rom/rom_api.c
+++ b/drivers/renesas/rcar/rom/rom_api.c
@@ -19,8 +19,9 @@
#define OLD_API_TABLE1 (0U) /* H3 Ver.1.0/Ver.1.1 */
#define OLD_API_TABLE2 (1U) /* H3 Ver.2.0 */
#define OLD_API_TABLE3 (2U) /* M3 Ver.1.0 */
-#define NEW_API_TABLE (3U) /* H3 Ver.3.0, M3 Ver.1.1 or later, M3N, E3, D3 */
-#define API_TABLE_MAX (4U) /* table max */
+#define NEW_API_TABLE (3U) /* H3 Ver.3.0, M3 Ver.1.1 or later, M3N, E3, D3, V3M WS2.0 */
+#define NEW_API_TABLE2 (4U) /* V3M WS1.0 */
+#define API_TABLE_MAX (5U) /* table max */
/* Later than H3 Ver.2.0 */
static uint32_t get_table_index(void)
@@ -51,6 +52,14 @@
/* M3 Ver.1.1 or later */
index = NEW_API_TABLE;
break;
+ case RCAR_PRODUCT_V3M:
+ if (cut_ver == RCAR_CUT_VER10)
+ /* V3M WS1.0 */
+ index = NEW_API_TABLE2;
+ else
+ /* V3M WS2.0 or later */
+ index = NEW_API_TABLE;
+ break;
default:
index = NEW_API_TABLE;
break;
@@ -66,7 +75,8 @@
0xEB10DD64U, /* H3 Ver.1.0/Ver.1.1 */
0xEB116ED4U, /* H3 Ver.2.0 */
0xEB1102FCU, /* M3 Ver.1.0 */
- 0xEB100180U /* H3 Ver.3.0, M3 Ver.1.1 or later, M3N, E3, D3 */
+ 0xEB100180U, /* H3 Ver.3.0, M3 Ver.1.1 or later, M3N, E3, D3, V3M WS2.0 */
+ 0xEB110128U, /* V3M WS1.0 */
};
rom_secure_boot_api_f secure_boot;
uint32_t index;
@@ -83,7 +93,8 @@
0xEB10DFE0U, /* H3 Ver.1.0/Ver.1.1 */
0xEB117150U, /* H3 Ver.2.0 */
0xEB110578U, /* M3 Ver.1.0 */
- 0xEB10018CU /* H3 Ver.3.0, M3 Ver.1.1 or later, M3N, E3, D3 */
+ 0xEB10018CU, /* H3 Ver.3.0, M3 Ver.1.1 or later, M3N, E3, D3, V3M WS2.0 */
+ 0xEB1103A4U, /* V3M WS1.0 */
};
rom_get_lcs_api_f get_lcs;
uint32_t index;
diff --git a/drivers/renesas/rcar/scif/scif.S b/drivers/renesas/rcar/scif/scif.S
index 19b32e3..471d7b8 100644
--- a/drivers/renesas/rcar/scif/scif.S
+++ b/drivers/renesas/rcar/scif/scif.S
@@ -21,12 +21,16 @@
/* module stop */
#define CPG_BASE (0xE6150000)
+#define CPG_SMSTPCR2 (0x0138)
#define CPG_SMSTPCR3 (0x013C)
+#define CPG_MSTPSR2 (0x0040)
#define CPG_MSTPSR3 (0x0048)
+#define MSTP207 (1 << 7)
#define MSTP310 (1 << 10)
#define CPG_CPGWPR (0x0900)
/* scif */
+#define SCIF0_BASE (0xE6E60000)
#define SCIF2_BASE (0xE6E88000)
#define SCIF_SCSMR (0x00)
#define SCIF_SCBRR (0x04)
@@ -41,6 +45,18 @@
#define SCIF_DL (0x30)
#define SCIF_CKS (0x34)
+#if RCAR_LSI == RCAR_V3M
+#define SCIF_BASE SCIF0_BASE
+#define CPG_SMSTPCR CPG_SMSTPCR2
+#define CPG_MSTPSR CPG_MSTPSR2
+#define MSTP MSTP207
+#else
+#define SCIF_BASE SCIF2_BASE
+#define CPG_SMSTPCR CPG_SMSTPCR3
+#define CPG_MSTPSR CPG_MSTPSR3
+#define MSTP MSTP310
+#endif
+
/* mode pin */
#define RST_MODEMR (0xE6160060)
#define MODEMR_MD12 (0x00001000)
@@ -152,17 +168,17 @@
*/
func console_core_init
ldr x0, =CPG_BASE
- ldr w1, [x0, #CPG_SMSTPCR3]
- and w1, w1, #~MSTP310 /* MSTP310=0 */
+ ldr w1, [x0, #CPG_SMSTPCR]
+ and w1, w1, #~MSTP
mvn w2, w1
str w2, [x0, #CPG_CPGWPR]
- str w1, [x0, #CPG_SMSTPCR3]
+ str w1, [x0, #CPG_SMSTPCR]
5:
- ldr w1, [x0, #CPG_MSTPSR3]
- and w1, w1, #MSTP310
+ ldr w1, [x0, #CPG_MSTPSR]
+ and w1, w1, #MSTP
cbnz w1, 5b
- ldr x0, =SCIF2_BASE
+ ldr x0, =SCIF_BASE
/* Clear bits TE and RE in SCSCR to 0 */
mov w1, #(SCSCR_TE_DIS + SCSCR_RE_DIS)
strh w1, [x0, #SCIF_SCSCR]
@@ -272,7 +288,7 @@
* --------------------------------------------------------
*/
func console_core_putc
- ldr x1, =SCIF2_BASE
+ ldr x1, =SCIF_BASE
cmp w0, #0xA
/* Prepend '\r' to '\n' */
bne 2f
@@ -323,7 +339,7 @@
* ---------------------------------------------
*/
func console_flush
- ldr x0, =SCIF2_BASE
+ ldr x0, =SCIF_BASE
1:
/* Check TEND flag */
ldrh w1, [x0, #SCIF_SCFSR]
@@ -331,7 +347,7 @@
cmp w1, #SCFSR_TEND_TRANS_END
bne 1b
- ldr x0, =SCIF2_BASE
+ ldr x0, =SCIF_BASE
ldrh w1, [x0, #SCIF_SCSCR]
and w1, w1, #~(SCSCR_TE_EN + SCSCR_RE_EN)
strh w1, [x0, #SCIF_SCSCR]