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git01.mediatek.com / filogic / atf / f1d230c37360772bcd8edb44ce12383be7ee45de / . / plat / xilinx / versal
tree: 7b3169d051bc53b0a3644fede1bf1f55d9a6c6da [path history] [tgz]
  1. aarch64/
  2. include/
  3. bl31_versal_setup.c
  4. plat_psci.c
  5. plat_topology.c
  6. plat_versal.c
  7. platform.mk
  8. sip_svc_setup.c
  9. versal_def.h
  10. versal_gicv3.c
  11. versal_private.h