Remove some MISRA defects in common code
No functional changes.
Change-Id: I9638e02acb9b22eb794ebf45aad84348a710287e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/include/lib/aarch32/smccc_helpers.h b/include/lib/aarch32/smccc_helpers.h
index d6e525f..5eeb204 100644
--- a/include/lib/aarch32/smccc_helpers.h
+++ b/include/lib/aarch32/smccc_helpers.h
@@ -10,19 +10,19 @@
#include <smccc.h>
/* These are offsets to registers in smc_ctx_t */
-#define SMC_CTX_GPREG_R0 0x0
-#define SMC_CTX_GPREG_R1 0x4
-#define SMC_CTX_GPREG_R2 0x8
-#define SMC_CTX_GPREG_R3 0xC
-#define SMC_CTX_GPREG_R4 0x10
-#define SMC_CTX_GPREG_R5 0x14
-#define SMC_CTX_SP_USR 0x34
-#define SMC_CTX_SPSR_MON 0x78
-#define SMC_CTX_SP_MON 0x7C
-#define SMC_CTX_LR_MON 0x80
-#define SMC_CTX_SCR 0x84
-#define SMC_CTX_PMCR 0x88
-#define SMC_CTX_SIZE 0x90
+#define SMC_CTX_GPREG_R0 U(0x0)
+#define SMC_CTX_GPREG_R1 U(0x4)
+#define SMC_CTX_GPREG_R2 U(0x8)
+#define SMC_CTX_GPREG_R3 U(0xC)
+#define SMC_CTX_GPREG_R4 U(0x10)
+#define SMC_CTX_GPREG_R5 U(0x14)
+#define SMC_CTX_SP_USR U(0x34)
+#define SMC_CTX_SPSR_MON U(0x78)
+#define SMC_CTX_SP_MON U(0x7C)
+#define SMC_CTX_LR_MON U(0x80)
+#define SMC_CTX_SCR U(0x84)
+#define SMC_CTX_PMCR U(0x88)
+#define SMC_CTX_SIZE U(0x90)
#ifndef __ASSEMBLY__
#include <cassert.h>
@@ -105,7 +105,7 @@
CASSERT(SMC_CTX_SPSR_MON == __builtin_offsetof(smc_ctx_t, spsr_mon), \
assert_smc_ctx_spsr_mon_offset_mismatch);
-CASSERT((sizeof(smc_ctx_t) & 0x7) == 0, assert_smc_ctx_not_aligned);
+CASSERT((sizeof(smc_ctx_t) & 0x7U) == 0U, assert_smc_ctx_not_aligned);
CASSERT(SMC_CTX_SIZE == sizeof(smc_ctx_t), assert_smc_ctx_size_mismatch);
/* Convenience macros to return from SMC handler */
diff --git a/include/lib/aarch64/smccc_helpers.h b/include/lib/aarch64/smccc_helpers.h
index 4d9217b..c76faf5 100644
--- a/include/lib/aarch64/smccc_helpers.h
+++ b/include/lib/aarch64/smccc_helpers.h
@@ -11,6 +11,7 @@
#ifndef __ASSEMBLY__
#include <context.h>
+#include <stdbool.h>
/* Convenience macros to return from SMC handler */
#define SMC_RET0(_h) { \
@@ -77,7 +78,7 @@
_x2 = read_ctx_reg(regs, CTX_GPREG_X2); \
_x3 = read_ctx_reg(regs, CTX_GPREG_X3); \
_x4 = read_ctx_reg(regs, CTX_GPREG_X4); \
- } while (0)
+ } while (false)
#endif /*__ASSEMBLY__*/
diff --git a/include/lib/pmf/pmf_asm_macros.S b/include/lib/pmf/pmf_asm_macros.S
index 9ee8199..d58829e 100644
--- a/include/lib/pmf/pmf_asm_macros.S
+++ b/include/lib/pmf/pmf_asm_macros.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -14,7 +14,7 @@
* for the given service name and local timestamp id.
* Clobbers: x0 - x9
*/
- .macro pmf_calc_timestamp_addr _name _tid
+ .macro pmf_calc_timestamp_addr _name, _tid
mov x9, x30
bl plat_my_core_pos
mov x30, x9
diff --git a/include/lib/runtime_instr.h b/include/lib/runtime_instr.h
index b2f1a69..ed564e2 100644
--- a/include/lib/runtime_instr.h
+++ b/include/lib/runtime_instr.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -7,13 +7,15 @@
#ifndef __RUNTIME_INSTR_H__
#define __RUNTIME_INSTR_H__
-#define RT_INSTR_ENTER_PSCI 0
-#define RT_INSTR_EXIT_PSCI 1
-#define RT_INSTR_ENTER_HW_LOW_PWR 2
-#define RT_INSTR_EXIT_HW_LOW_PWR 3
-#define RT_INSTR_ENTER_CFLUSH 4
-#define RT_INSTR_EXIT_CFLUSH 5
-#define RT_INSTR_TOTAL_IDS 6
+#include <utils_def.h>
+
+#define RT_INSTR_ENTER_PSCI U(0)
+#define RT_INSTR_EXIT_PSCI U(1)
+#define RT_INSTR_ENTER_HW_LOW_PWR U(2)
+#define RT_INSTR_EXIT_HW_LOW_PWR U(3)
+#define RT_INSTR_ENTER_CFLUSH U(4)
+#define RT_INSTR_EXIT_CFLUSH U(5)
+#define RT_INSTR_TOTAL_IDS U(6)
#ifndef __ASSEMBLY__
PMF_DECLARE_CAPTURE_TIMESTAMP(rt_instr_svc)