arm_fpga: Read generic timer counter frequency from DT
The ARM Generic Timer DT binding describes an (optional) property to
declare the counter frequency. Its usage is normally discouraged, as the
value should be read from the CNTFRQ_EL0 system register.
However in our case we can use it to program this register in the first
place, which avoids us to hard code a counter frequency into the code.
We keep some default value in, if the DT lacks that property for
whatever reason.
Change-Id: I5b71176db413f904f21eb16f3302fbb799cb0305
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
diff --git a/plat/arm/board/arm_fpga/fpga_bl31_setup.c b/plat/arm/board/arm_fpga/fpga_bl31_setup.c
index 6329497..e4b9767 100644
--- a/plat/arm/board/arm_fpga/fpga_bl31_setup.c
+++ b/plat/arm/board/arm_fpga/fpga_bl31_setup.c
@@ -5,8 +5,11 @@
*/
#include <assert.h>
-#include <lib/mmio.h>
+
+#include <common/fdt_wrappers.h>
#include <drivers/generic_delay_timer.h>
+#include <lib/mmio.h>
+#include <libfdt.h>
#include <plat/common/platform.h>
#include <platform_def.h>
@@ -76,7 +79,16 @@
unsigned int plat_get_syscnt_freq2(void)
{
- return FPGA_TIMER_FREQUENCY;
+ const void *fdt = (void *)(uintptr_t)FPGA_PRELOADED_DTB_BASE;
+ int node;
+
+ node = fdt_node_offset_by_compatible(fdt, 0, "arm,armv8-timer");
+ if (node < 0) {
+ return FPGA_DEFAULT_TIMER_FREQUENCY;
+ }
+
+ return fdt_read_uint32_default(fdt, node, "clock-frequency",
+ FPGA_DEFAULT_TIMER_FREQUENCY);
}
void bl31_plat_enable_mmu(uint32_t flags)
diff --git a/plat/arm/board/arm_fpga/fpga_def.h b/plat/arm/board/arm_fpga/fpga_def.h
index 6092637..0bb2b22 100644
--- a/plat/arm/board/arm_fpga/fpga_def.h
+++ b/plat/arm/board/arm_fpga/fpga_def.h
@@ -31,6 +31,6 @@
#define PLAT_FPGA_BOOT_UART_BASE 0x7ff80000
#define PLAT_FPGA_CRASH_UART_BASE PLAT_FPGA_BOOT_UART_BASE
-#define FPGA_TIMER_FREQUENCY 10000000
+#define FPGA_DEFAULT_TIMER_FREQUENCY 10000000
#endif
diff --git a/plat/arm/board/arm_fpga/platform.mk b/plat/arm/board/arm_fpga/platform.mk
index 3350000..0d0d010 100644
--- a/plat/arm/board/arm_fpga/platform.mk
+++ b/plat/arm/board/arm_fpga/platform.mk
@@ -4,6 +4,8 @@
# SPDX-License-Identifier: BSD-3-Clause
#
+include lib/libfdt/libfdt.mk
+
RESET_TO_BL31 := 1
ifeq (${RESET_TO_BL31}, 0)
$(error "This is a BL31-only port; RESET_TO_BL31 must be enabled")
@@ -82,7 +84,8 @@
PLAT_BL_COMMON_SOURCES := plat/arm/board/arm_fpga/${ARCH}/fpga_helpers.S
-BL31_SOURCES += drivers/delay_timer/delay_timer.c \
+BL31_SOURCES += common/fdt_wrappers.c \
+ drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \
drivers/arm/pl011/${ARCH}/pl011_console.S \
plat/common/plat_psci_common.c \